mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-06-13 22:24:07 +00:00
[mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=mips[1234] does not accept them
Summary: This required a new instruction group representing the 32-bit subset of MIPS-V that was available in MIPS32R2 Most of these instructions are correctly rejected but with the wrong error message. These have been placed in a separate test for now. It happens because many of the MIPS V instructions have not been implemented. Depends on D3694 Reviewers: vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3695 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208546 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@ -81,7 +81,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
|
||||
MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false),
|
||||
IsFP64bit(false), IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false),
|
||||
HasCnMips(false), IsLinux(true), HasMips3_32(false), HasMips4_32(false),
|
||||
HasMips4_32r2(false), InMips16Mode(false),
|
||||
HasMips4_32r2(false), HasMips5_32r2(false), InMips16Mode(false),
|
||||
InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false),
|
||||
HasDSPR2(false), AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16),
|
||||
HasMSA(false), RM(_RM), OverrideMode(NoOverride), TM(_TM),
|
||||
|
Reference in New Issue
Block a user