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PowerPC instruction definitions use LittleEndian-style encoding [0..31]

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16977 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2004-10-14 05:54:38 +00:00
parent 99ee67ab19
commit 315d3341fd
3 changed files with 6 additions and 0 deletions
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2
lib/Target/PowerPC/PPC32.td
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@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
"Arg3Type", "Arg4Type", "VMX", "PPC64"]; "Arg3Type", "Arg4Type", "VMX", "PPC64"];
let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ]; let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
let isLittleEndianEncoding = 1;
} }
def PPC32 : Target { def PPC32 : Target {

2
lib/Target/PowerPC/PPC64.td
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@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
"Arg3Type", "Arg4Type", "VMX", "PPC64"]; "Arg3Type", "Arg4Type", "VMX", "PPC64"];
let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ]; let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
let isLittleEndianEncoding = 1;
} }
def PPC64 : Target { def PPC64 : Target {

2
lib/Target/PowerPC/PowerPC.td
View File

@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
"Arg3Type", "Arg4Type", "VMX", "PPC64"]; "Arg3Type", "Arg4Type", "VMX", "PPC64"];
let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ]; let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
let isLittleEndianEncoding = 1;
} }
def PowerPC : Target { def PowerPC : Target {