[Tablegen] Attempt to add support for patterns containing nodes with multiple results.

This is needed for AVX512 masked scatter/gather support.

The R600 change is necessary to remove a hack that was working around the lack of multiple results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232798 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2015-03-20 05:09:06 +00:00
parent 4aee931a46
commit 3220d112fa
2 changed files with 32 additions and 27 deletions

View File

@ -3179,26 +3179,26 @@ multiclass SI_INDIRECT_Pattern <ValueType vt, ValueType eltvt, SI_INDIRECT_DST I
// 1. Extract with offset // 1. Extract with offset
def : Pat< def : Pat<
(vector_extract vt:$vec, (add i32:$idx, imm:$off)), (eltvt (vector_extract vt:$vec, (add i32:$idx, imm:$off))),
(eltvt (SI_INDIRECT_SRC (IMPLICIT_DEF), $vec, $idx, imm:$off)) (SI_INDIRECT_SRC $vec, $idx, imm:$off)
>; >;
// 2. Extract without offset // 2. Extract without offset
def : Pat< def : Pat<
(vector_extract vt:$vec, i32:$idx), (eltvt (vector_extract vt:$vec, i32:$idx)),
(eltvt (SI_INDIRECT_SRC (IMPLICIT_DEF), $vec, $idx, 0)) (SI_INDIRECT_SRC $vec, $idx, 0)
>; >;
// 3. Insert with offset // 3. Insert with offset
def : Pat< def : Pat<
(vector_insert vt:$vec, eltvt:$val, (add i32:$idx, imm:$off)), (vector_insert vt:$vec, eltvt:$val, (add i32:$idx, imm:$off)),
(IndDst (IMPLICIT_DEF), $vec, $idx, imm:$off, $val) (IndDst $vec, $idx, imm:$off, $val)
>; >;
// 4. Insert without offset // 4. Insert without offset
def : Pat< def : Pat<
(vector_insert vt:$vec, eltvt:$val, i32:$idx), (vector_insert vt:$vec, eltvt:$val, i32:$idx),
(IndDst (IMPLICIT_DEF), $vec, $idx, 0, $val) (IndDst $vec, $idx, 0, $val)
>; >;
} }

View File

@ -1196,8 +1196,16 @@ static unsigned GetNumNodeResults(Record *Operator, CodeGenDAGPatterns &CDP) {
if (Operator->isSubClassOf("Instruction")) { if (Operator->isSubClassOf("Instruction")) {
CodeGenInstruction &InstInfo = CDP.getTargetInfo().getInstruction(Operator); CodeGenInstruction &InstInfo = CDP.getTargetInfo().getInstruction(Operator);
// FIXME: Should allow access to all the results here. unsigned NumDefsToAdd = InstInfo.Operands.NumDefs;
unsigned NumDefsToAdd = InstInfo.Operands.NumDefs ? 1 : 0;
// Subtract any defaulted outputs.
for (unsigned i = 0; i != InstInfo.Operands.NumDefs; ++i) {
Record *OperandNode = InstInfo.Operands[i].Rec;
if (OperandNode->isSubClassOf("OperandWithDefaultOps") &&
!CDP.getDefaultOperand(OperandNode).DefaultOps.empty())
--NumDefsToAdd;
}
// Add on one implicit def if it has a resolvable type. // Add on one implicit def if it has a resolvable type.
if (InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()) !=MVT::Other) if (InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()) !=MVT::Other)
@ -1774,8 +1782,8 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
// Apply the result types to the node, these come from the things in the // Apply the result types to the node, these come from the things in the
// (outs) list of the instruction. // (outs) list of the instruction.
// FIXME: Cap at one result so far. unsigned NumResultsToAdd = std::min(InstInfo.Operands.NumDefs,
unsigned NumResultsToAdd = InstInfo.Operands.NumDefs ? 1 : 0; Inst.getNumResults());
for (unsigned ResNo = 0; ResNo != NumResultsToAdd; ++ResNo) for (unsigned ResNo = 0; ResNo != NumResultsToAdd; ++ResNo)
MadeChange |= UpdateNodeTypeFromInst(ResNo, Inst.getResult(ResNo), TP); MadeChange |= UpdateNodeTypeFromInst(ResNo, Inst.getResult(ResNo), TP);
@ -2941,7 +2949,7 @@ const DAGInstruction &CodeGenDAGPatterns::parseInstructionPattern(
// Check that all of the results occur first in the list. // Check that all of the results occur first in the list.
std::vector<Record*> Results; std::vector<Record*> Results;
TreePatternNode *Res0Node = nullptr; SmallVector<TreePatternNode *, 2> ResNodes;
for (unsigned i = 0; i != NumResults; ++i) { for (unsigned i = 0; i != NumResults; ++i) {
if (i == CGI.Operands.size()) if (i == CGI.Operands.size())
I->error("'" + InstResults.begin()->first + I->error("'" + InstResults.begin()->first +
@ -2953,8 +2961,8 @@ const DAGInstruction &CodeGenDAGPatterns::parseInstructionPattern(
if (!RNode) if (!RNode)
I->error("Operand $" + OpName + " does not exist in operand list!"); I->error("Operand $" + OpName + " does not exist in operand list!");
if (i == 0) ResNodes.push_back(RNode);
Res0Node = RNode;
Record *R = cast<DefInit>(RNode->getLeafValue())->getDef(); Record *R = cast<DefInit>(RNode->getLeafValue())->getDef();
if (!R) if (!R)
I->error("Operand $" + OpName + " should be a set destination: all " I->error("Operand $" + OpName + " should be a set destination: all "
@ -3029,9 +3037,11 @@ const DAGInstruction &CodeGenDAGPatterns::parseInstructionPattern(
TreePatternNode *ResultPattern = TreePatternNode *ResultPattern =
new TreePatternNode(I->getRecord(), ResultNodeOperands, new TreePatternNode(I->getRecord(), ResultNodeOperands,
GetNumNodeResults(I->getRecord(), *this)); GetNumNodeResults(I->getRecord(), *this));
// Copy fully inferred output node type to instruction result pattern. // Copy fully inferred output node types to instruction result pattern.
for (unsigned i = 0; i != NumResults; ++i) for (unsigned i = 0; i != NumResults; ++i) {
ResultPattern->setType(i, Res0Node->getExtType(i)); assert(ResNodes[i]->getNumTypes() == 1 && "FIXME: Unhandled");
ResultPattern->setType(i, ResNodes[i]->getExtType(0));
}
// Create and insert the instruction. // Create and insert the instruction.
// FIXME: InstImpResults should not be part of DAGInstruction. // FIXME: InstImpResults should not be part of DAGInstruction.
@ -3075,19 +3085,14 @@ void CodeGenDAGPatterns::ParseInstructions() {
CodeGenInstruction &InstInfo = Target.getInstruction(Instrs[i]); CodeGenInstruction &InstInfo = Target.getInstruction(Instrs[i]);
if (InstInfo.Operands.size() != 0) { if (InstInfo.Operands.size() != 0) {
if (InstInfo.Operands.NumDefs == 0) { for (unsigned j = 0, e = InstInfo.Operands.NumDefs; j < e; ++j)
// These produce no results Results.push_back(InstInfo.Operands[j].Rec);
for (unsigned j = 0, e = InstInfo.Operands.size(); j < e; ++j)
Operands.push_back(InstInfo.Operands[j].Rec);
} else {
// Assume the first operand is the result.
Results.push_back(InstInfo.Operands[0].Rec);
// The rest are inputs. // The rest are inputs.
for (unsigned j = 1, e = InstInfo.Operands.size(); j < e; ++j) for (unsigned j = InstInfo.Operands.NumDefs,
e = InstInfo.Operands.size(); j < e; ++j)
Operands.push_back(InstInfo.Operands[j].Rec); Operands.push_back(InstInfo.Operands[j].Rec);
} }
}
// Create and insert the instruction. // Create and insert the instruction.
std::vector<Record*> ImpResults; std::vector<Record*> ImpResults;