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ARM: fix an off-by-one in the register list access

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Fix an off-by-one access introduced in 224502 for push.w and pop.w with single
register operands.  Add test cases for both scenarios.

Thanks to Asiri Rathnayake for pointing out the failure!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224521 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Saleem Abdulrasool 2014-12-18 16:16:53 +00:00
parent c82c8a824a
commit 3299448769
2 changed files with 15 additions and 7 deletions
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4
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -6282,10 +6282,10 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
"writeback register not allowed in register list");
if (Opcode == ARM::t2LDMIA_UPD || Opcode == ARM::t2LDMDB_UPD) {
if (validatetLDMRegList(Inst, Operands, 4))
if (validatetLDMRegList(Inst, Operands, 3))
return true;
} else {
if (validatetSTMRegList(Inst, Operands, 4))
if (validatetSTMRegList(Inst, Operands, 3))
return true;
}
break;

18
test/MC/ARM/thumb-load-store-multiple.s
View File

@ -1,4 +1,4 @@
@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null %s 2>&1 \
@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o - %s 2>&1 \
@ RUN: | FileCheck %s
.syntax unified
@ -69,10 +69,6 @@ push:
.global pop
.type pop,%function
pop:
pop {sp}
@ CHECK-NOT: error: SP may not be in the register list
pop {sp, pc}
@ CHECK-NOT: error: SP may not be in the register list
pop {lr, pc}
@ CHECK: error: PC and LR may not be in the register list simultaneously
@ CHECK: pop {lr, pc}
@ -84,3 +80,15 @@ pop:
@ CHECK: popeq {r1, pc}
@ CHECK: ^
.global valid
.type valid,%function
valid:
pop {sp}
@ CHECK: ldr sp, [sp], #4
pop {sp, pc}
@ CHECK: pop.w {sp, pc}
push.w {r0}
@ CHECK: str r0, [sp, #-4]
pop.w {r0}
@ CHECK: ldr r0, [sp], #4