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Add bad register checks for Thumb2 Ld/St instructions.
rdar://problem/9269047 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129387 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1862,6 +1862,47 @@ static bool DisassembleThumb2PreLoad(MCInst &MI, unsigned Opcode, uint32_t insn,
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return true;
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}
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static bool BadRegsThumb2LdSt(unsigned Opcode, uint32_t insn, bool Load,
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unsigned R0, unsigned R1, unsigned R2, bool UseRm, bool WB) {
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// Inst{22-21} encodes the data item transferred for load/store.
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// For single word, it is encoded as ob10.
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bool Word = (slice(insn, 22, 21) == 2);
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if (UseRm && BadReg(R2)) {
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DEBUG(errs() << "if BadReg(m) then UNPREDICTABLE\n");
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return true;
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}
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if (Load) {
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if (!Word && R0 == 13) {
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DEBUG(errs() << "if t == 13 then UNPREDICTABLE\n");
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return true;
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}
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} else {
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if (WB && R0 == R1) {
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DEBUG(errs() << "if wback && n == t then UNPREDICTABLE\n");
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return true;
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}
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if ((WB && R0 == 15) || (!WB && R1 == 15)) {
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DEBUG(errs() << "if Rn == '1111' then UNDEFINED\n");
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return true;
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}
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if (Word) {
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if ((WB && R1 == 15) || (!WB && R0 == 15)) {
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DEBUG(errs() << "if t == 15 then UNPREDICTABLE\n");
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return true;
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}
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} else {
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if ((WB && BadReg(R1)) || (!WB && BadReg(R0))) {
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DEBUG(errs() << "if BadReg(t) then UNPREDICTABLE\n");
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return true;
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}
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}
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}
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return false;
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}
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// A6.3.10 Store single data item
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// A6.3.9 Load byte, memory hints
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// A6.3.8 Load halfword, memory hints
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@ -1961,6 +2002,10 @@ static bool DisassembleThumb2LdSt(bool Load, MCInst &MI, unsigned Opcode,
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++OpIdx;
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}
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if (BadRegsThumb2LdSt(Opcode, insn, Load, R0, R1, R2, ThreeReg & !TIED_TO,
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TIED_TO))
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return false;
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assert(OpInfo[OpIdx].RegClass < 0 && !OpInfo[OpIdx].isPredicate()
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&& !OpInfo[OpIdx].isOptionalDef()
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&& "Pure imm operand expected");
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10
test/MC/Disassembler/ARM/invalid-t2STR_POST-thumb.txt
Normal file
10
test/MC/Disassembler/ARM/invalid-t2STR_POST-thumb.txt
Normal file
@ -0,0 +1,10 @@
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# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}
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# Opcode=2137 Name=t2STR_POST Format=ARM_FORMAT_THUMBFRM(25)
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# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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# -------------------------------------------------------------------------------------------------
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# | 1: 1: 1: 1| 1: 0: 0: 0| 0: 1: 0: 0| 1: 1: 1: 1| 1: 1: 1: 0| 1: 0: 1: 1| 1: 1: 1: 1| 1: 1: 1: 1|
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# -------------------------------------------------------------------------------------------------
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#
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# if Rn == '1111' then UNDEFINED
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0x4f 0xf8 0xff 0xeb
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