From 32d728fbb978f9fef65abbc57f19a80cb28350e1 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Tue, 14 Oct 2014 22:12:14 +0000 Subject: [PATCH] ARM: allow misaligned local variables in Thumb1 mode. There's no hard requirement on LLVM to align local variable to 32-bits, so the Thumb1 frame handling needs to be able to deal with variables that are only naturally aligned without falling over. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219733 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/Thumb1RegisterInfo.cpp | 4 +--- test/CodeGen/ARM/atomic-op.ll | 2 ++ 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/Target/ARM/Thumb1RegisterInfo.cpp b/lib/Target/ARM/Thumb1RegisterInfo.cpp index fb8aaff9269..d0626311dd1 100644 --- a/lib/Target/ARM/Thumb1RegisterInfo.cpp +++ b/lib/Target/ARM/Thumb1RegisterInfo.cpp @@ -364,8 +364,6 @@ rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx, } else { NumBits = 8; Scale = 4; - assert((Offset & 3) == 0 && - "Thumb add/sub sp, #imm immediate must be multiple of 4!"); } unsigned PredReg; @@ -380,7 +378,7 @@ rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx, // Common case: small offset, fits into instruction. unsigned Mask = (1 << NumBits) - 1; - if (((Offset / Scale) & ~Mask) == 0) { + if (Offset % Scale == 0 && ((Offset / Scale) & ~Mask) == 0) { // Replace the FrameIndex with sp / fp if (Opcode == ARM::tADDi3) { MI.setDesc(TII.get(Opcode)); diff --git a/test/CodeGen/ARM/atomic-op.ll b/test/CodeGen/ARM/atomic-op.ll index c0171a8da12..1ac86485c55 100644 --- a/test/CodeGen/ARM/atomic-op.ll +++ b/test/CodeGen/ARM/atomic-op.ll @@ -4,6 +4,8 @@ ; RUN: llc < %s -mtriple=thumbv6-apple-ios -verify-machineinstrs -mcpu=cortex-m0 | FileCheck %s --check-prefix=CHECK-M0 ; RUN: llc < %s -mtriple=thumbv7--none-eabi -thread-model single -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-BAREMETAL +target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" + define void @func(i32 %argc, i8** %argv) nounwind { entry: %argc.addr = alloca i32 ; [#uses=1]