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EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
(almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -220,6 +220,24 @@ int MachineInstr::findFirstPredOperandIdx() const {
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return -1;
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}
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/// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
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/// to two addr elimination.
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bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg) const {
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const TargetInstrDescriptor *TID = getInstrDescriptor();
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
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const MachineOperand &MO1 = getOperand(i);
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if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) {
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for (unsigned j = i+1; j < e; ++j) {
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const MachineOperand &MO2 = getOperand(j);
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if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == Reg &&
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TID->getOperandConstraint(j, TOI::TIED_TO) == (int)i)
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return true;
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}
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}
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}
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return false;
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}
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/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
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///
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void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
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