Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75929 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov
2009-07-16 13:44:00 +00:00
parent 4cad7d29fc
commit 3360da9772
3 changed files with 268 additions and 12 deletions

View File

@@ -52,6 +52,8 @@ namespace {
const char* Modifier = 0);
void printRIAddrOperand(const MachineInstr *MI, int OpNum,
const char* Modifier = 0);
void printRRIAddrOperand(const MachineInstr *MI, int OpNum,
const char* Modifier = 0);
bool printInstruction(const MachineInstr *MI); // autogenerated.
void printMachineInstruction(const MachineInstr * MI);
@@ -196,10 +198,31 @@ void SystemZAsmPrinter::printRIAddrOperand(const MachineInstr *MI, int OpNum,
printOperand(MI, OpNum+1);
// Print base operand (if any)
if (!(Base.isReg() && Base.getReg() == SystemZ::R0D)) {
if (Base.getReg()) {
O << '(';
printOperand(MI, OpNum);
O << ')';
}
}
void SystemZAsmPrinter::printRRIAddrOperand(const MachineInstr *MI, int OpNum,
const char* Modifier) {
const MachineOperand &Base = MI->getOperand(OpNum);
const MachineOperand &Index = MI->getOperand(OpNum);
// Print displacement operand.
printOperand(MI, OpNum+2);
// Print base operand (if any)
if (Base.getReg()) {
O << '(';
printOperand(MI, OpNum);
if (Index.getReg()) {
O << ',';
printOperand(MI, OpNum+1);
}
O << ')';
} else
assert(!Index.getReg() && "Should allocate base register first!");
}