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fix some more ambiguous patterns, remove another nontemporalstore

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pattern which is broken (source and address swapped).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97958 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-03-08 18:57:56 +00:00
parent 341b27406d
commit 3485b51c4d
2 changed files with 12 additions and 14 deletions
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9
lib/Target/X86/X86InstrMMX.td
View File

@ -160,7 +160,8 @@ def MMX_MOVQ2DQrr : SSDIi8<0xD6, MRMSrcReg, (outs VR128:$dst), (ins VR64:$src),
"movq2dq\t{$src, $dst|$dst, $src}",
[(set VR128:$dst,
(movl immAllZerosV,
(v2i64 (scalar_to_vector (i64 (bitconvert VR64:$src))))))]>;
(v2i64 (scalar_to_vector
(i64 (bitconvert (v1i64 VR64:$src)))))))]>;
let neverHasSideEffects = 1 in
def MMX_MOVQ2FR64rr: SSDIi8<0xD6, MRMSrcReg, (outs FR64:$dst), (ins VR64:$src),
@ -271,9 +272,9 @@ defm MMX_PSRAD : MMXI_binop_rmi_int<0xE2, 0x72, MRM4r, "psrad",
// Shift up / down and insert zero's.
def : Pat<(v1i64 (X86vshl VR64:$src, (i8 imm:$amt))),
(v1i64 (MMX_PSLLQri VR64:$src, imm:$amt))>;
(MMX_PSLLQri VR64:$src, imm:$amt)>;
def : Pat<(v1i64 (X86vshr VR64:$src, (i8 imm:$amt))),
(v1i64 (MMX_PSRLQri VR64:$src, imm:$amt))>;
(MMX_PSRLQri VR64:$src, imm:$amt)>;
// Comparison Instructions
defm MMX_PCMPEQB : MMXI_binop_rm_int<0x74, "pcmpeqb", int_x86_mmx_pcmpeq_b>;
@ -577,7 +578,7 @@ let AddedComplexity = 20 in {
// Clear top half.
let AddedComplexity = 15 in {
def : Pat<(v2i32 (X86vzmovl VR64:$src)),
(MMX_PUNPCKLDQrr VR64:$src, (MMX_V_SET0))>;
(MMX_PUNPCKLDQrr VR64:$src, (v2i32 (MMX_V_SET0)))>;
}
// Patterns to perform canonical versions of vector shuffling.

17
lib/Target/X86/X86InstrSSE.td
View File

@ -385,7 +385,7 @@ def MOVSSrr : SSI<0x10, MRMSrcReg,
// Extract the low 32-bit value from one vector and insert it into another.
let AddedComplexity = 15 in
def : Pat<(v4f32 (movl VR128:$src1, VR128:$src2)),
(MOVSSrr VR128:$src1,
(MOVSSrr (v4f32 VR128:$src1),
(EXTRACT_SUBREG (v4f32 VR128:$src2), x86_subreg_ss))>;
// Implicitly promote a 32-bit scalar to a vector.
@ -827,7 +827,7 @@ let Constraints = "$src1 = $dst" in {
def : Pat<(movlhps VR128:$src1, (bc_v4i32 (v2i64 (X86vzload addr:$src2)))),
(MOVHPSrm VR128:$src1, addr:$src2)>;
(MOVHPSrm (v4i32 VR128:$src1), addr:$src2)>;
def MOVLPSmr : PSI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
"movlps\t{$src, $dst|$dst, $src}",
@ -860,9 +860,9 @@ def MOVHLPSrr : PSI<0x12, MRMSrcReg, (outs VR128:$dst),
let AddedComplexity = 20 in {
def : Pat<(v4f32 (movddup VR128:$src, (undef))),
(MOVLHPSrr VR128:$src, VR128:$src)>;
(MOVLHPSrr (v4f32 VR128:$src), (v4f32 VR128:$src))>;
def : Pat<(v2i64 (movddup VR128:$src, (undef))),
(MOVLHPSrr VR128:$src, VR128:$src)>;
(MOVLHPSrr (v2i64 VR128:$src), (v2i64 VR128:$src))>;
}
@ -1011,9 +1011,9 @@ let Constraints = "$src1 = $dst" in {
(memop addr:$src), imm:$cc))]>;
}
def : Pat<(v4i32 (X86cmpps (v4f32 VR128:$src1), VR128:$src2, imm:$cc)),
(CMPPSrri VR128:$src1, VR128:$src2, imm:$cc)>;
(CMPPSrri (v4f32 VR128:$src1), (v4f32 VR128:$src2), imm:$cc)>;
def : Pat<(v4i32 (X86cmpps (v4f32 VR128:$src1), (memop addr:$src2), imm:$cc)),
(CMPPSrmi VR128:$src1, addr:$src2, imm:$cc)>;
(CMPPSrmi (v4f32 VR128:$src1), addr:$src2, imm:$cc)>;
// Shuffle and unpack instructions
let Constraints = "$src1 = $dst" in {
@ -1147,7 +1147,7 @@ def MOVSDrr : SDI<0x10, MRMSrcReg,
// Extract the low 64-bit value from one vector and insert it into another.
let AddedComplexity = 15 in
def : Pat<(v2f64 (movl VR128:$src1, VR128:$src2)),
(MOVSDrr VR128:$src1,
(MOVSDrr (v2f64 VR128:$src1),
(EXTRACT_SUBREG (v2f64 VR128:$src2), x86_subreg_sd))>;
// Implicitly promote a 64-bit scalar to a vector.
@ -2391,9 +2391,6 @@ def MOVNTPDmr : PDI<0x2B, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
def MOVNTDQmr : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
"movntdq\t{$src, $dst|$dst, $src}",
[(alignednontemporalstore (v4f32 VR128:$src), addr:$dst)]>;
def : Pat<(alignednontemporalstore (v4i32 VR128:$src), addr:$dst),
(MOVNTDQmr VR128:$src, addr:$dst)>;
}
// Flush cache