From 348e02600ef0191b4e0621078fc81f935065c1f7 Mon Sep 17 00:00:00 2001 From: Eli Friedman Date: Sun, 1 Aug 2010 21:13:28 +0000 Subject: [PATCH] PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually improves the generated code in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109985 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Alpha/AlphaISelDAGToDAG.cpp | 4 ++-- test/CodeGen/Alpha/2010-08-01-mulreduce64.ll | 11 +++++++++++ 2 files changed, 13 insertions(+), 2 deletions(-) create mode 100644 test/CodeGen/Alpha/2010-08-01-mulreduce64.ll diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index d526dc0827b..d197bd15ef9 100644 --- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -113,8 +113,8 @@ namespace { static uint64_t getNearPower2(uint64_t x) { if (!x) return 0; unsigned at = CountLeadingZeros_64(x); - uint64_t complow = 1 << (63 - at); - uint64_t comphigh = 1 << (64 - at); + uint64_t complow = 1ULL << (63 - at); + uint64_t comphigh = 1ULL << (64 - at); //cerr << x << ":" << complow << ":" << comphigh << "\n"; if (abs64(complow - x) <= abs64(comphigh - x)) return complow; diff --git a/test/CodeGen/Alpha/2010-08-01-mulreduce64.ll b/test/CodeGen/Alpha/2010-08-01-mulreduce64.ll new file mode 100644 index 00000000000..b838ec949ea --- /dev/null +++ b/test/CodeGen/Alpha/2010-08-01-mulreduce64.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=alpha | FileCheck %s + +define fastcc i64 @getcount(i64 %s) { + %tmp431 = mul i64 %s, 12884901888 + ret i64 %tmp431 +} + +; CHECK: sll $16,33,$0 +; CHECK-NEXT: sll $16,32,$1 +; CHECK-NEXT: addq $0,$1,$0 +