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Allow explicit physical registers for implicit operands.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6468 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vikram S. Adve 2003-05-31 07:39:06 +00:00
parent 7952d6088e
commit 3497782f38
1 changed files with 11 additions and 1 deletions
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12
lib/CodeGen/MachineInstr.cpp
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@ -23,6 +23,7 @@ extern const TargetInstrDescriptor *TargetInstrDescriptors;
// Constructor for instructions with variable #operands
MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands)
: opCode(OpCode),
opCodeFlags(0),
operands(numOperands, MachineOperand()),
numImplicitRefs(0)
{
@ -36,6 +37,7 @@ MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands)
MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
bool XX, bool YY)
: opCode(Opcode),
opCodeFlags(0),
numImplicitRefs(0)
{
operands.reserve(numOperands);
@ -47,6 +49,7 @@ MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
MachineInstr::MachineInstr(MachineBasicBlock *MBB, MachineOpCode Opcode,
unsigned numOperands)
: opCode(Opcode),
opCodeFlags(0),
numImplicitRefs(0)
{
assert(MBB && "Cannot use inserting ctor with null basic block!");
@ -60,7 +63,7 @@ bool MachineInstr::OperandsComplete() const
{
int NumOperands = TargetInstrDescriptors[opCode].numOperands;
if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
return true; // Broken!
return true; // Broken: we have all the operands of this instruction!
return false;
}
@ -141,6 +144,13 @@ MachineInstr::SetRegForOperand(unsigned i, int regNum)
insertUsedReg(regNum);
}
void
MachineInstr::SetRegForImplicitRef(unsigned i, int regNum)
{
getImplicitOp(i).setRegForValue(regNum);
insertUsedReg(regNum);
}
// Subsitute all occurrences of Value* oldVal with newVal in all operands
// and all implicit refs. If defsOnly == true, substitute defs only.