mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-06-23 01:24:30 +00:00
Remove unused field. Change the way unused regs. are marked and
found to consider regType info (since multiple reg types may share the same reg class, e.g., single and double on Sparc). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7327 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -71,8 +71,6 @@ class PhyRegAlloc : public NonCopyable {
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AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
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AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
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LoopInfo *LoopDepthCalc; // to calculate loop depths
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LoopInfo *LoopDepthCalc; // to calculate loop depths
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std::vector<unsigned> ResColList; // A set of reserved regs if desired.
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// currently not used
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public:
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public:
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PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi,
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PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi,
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@ -87,11 +85,11 @@ public:
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// access to register classes by class ID
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// access to register classes by class ID
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//
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//
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const RegClass* getRegClassByID(unsigned int id) const {
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const RegClass* getRegClassByID(unsigned int id) const {
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return RegClassList[id];
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return RegClassList[id];
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}
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RegClass* getRegClassByID(unsigned int id) {
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return RegClassList[id];
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}
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}
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RegClass* getRegClassByID(unsigned int id) {
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return RegClassList[id]; }
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private:
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private:
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void addInterference(const Value *Def, const ValueSet *LVSet,
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void addInterference(const Value *Def, const ValueSet *LVSet,
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@ -134,11 +132,14 @@ private:
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std::vector<MachineInstr*>& MIBef,
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std::vector<MachineInstr*>& MIBef,
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std::vector<MachineInstr*>& MIAft);
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std::vector<MachineInstr*>& MIAft);
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int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst,
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int getUnusedUniRegAtMI(RegClass *RC, const int RegType,
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const ValueSet *LVSetBef);
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const MachineInstr *MInst, const ValueSet *LVSetBef);
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void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst );
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void setRelRegsUsedByThisInst(RegClass *RC, const int RegType,
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int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst);
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const MachineInstr *MInst );
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int getUniRegNotUsedByThisInst(RegClass *RC, const int RegType,
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const MachineInstr *MInst);
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void addInterf4PseudoInstr(const MachineInstr *MInst);
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void addInterf4PseudoInstr(const MachineInstr *MInst);
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};
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};
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@ -71,8 +71,6 @@ class PhyRegAlloc : public NonCopyable {
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AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
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AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
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LoopInfo *LoopDepthCalc; // to calculate loop depths
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LoopInfo *LoopDepthCalc; // to calculate loop depths
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std::vector<unsigned> ResColList; // A set of reserved regs if desired.
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// currently not used
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public:
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public:
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PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi,
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PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi,
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@ -87,11 +85,11 @@ public:
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// access to register classes by class ID
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// access to register classes by class ID
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//
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//
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const RegClass* getRegClassByID(unsigned int id) const {
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const RegClass* getRegClassByID(unsigned int id) const {
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return RegClassList[id];
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return RegClassList[id];
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}
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RegClass* getRegClassByID(unsigned int id) {
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return RegClassList[id];
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}
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}
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RegClass* getRegClassByID(unsigned int id) {
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return RegClassList[id]; }
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private:
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private:
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void addInterference(const Value *Def, const ValueSet *LVSet,
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void addInterference(const Value *Def, const ValueSet *LVSet,
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@ -134,11 +132,14 @@ private:
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std::vector<MachineInstr*>& MIBef,
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std::vector<MachineInstr*>& MIBef,
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std::vector<MachineInstr*>& MIAft);
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std::vector<MachineInstr*>& MIAft);
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int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst,
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int getUnusedUniRegAtMI(RegClass *RC, const int RegType,
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const ValueSet *LVSetBef);
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const MachineInstr *MInst, const ValueSet *LVSetBef);
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void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst );
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void setRelRegsUsedByThisInst(RegClass *RC, const int RegType,
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int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst);
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const MachineInstr *MInst );
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int getUniRegNotUsedByThisInst(RegClass *RC, const int RegType,
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const MachineInstr *MInst);
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void addInterf4PseudoInstr(const MachineInstr *MInst);
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void addInterf4PseudoInstr(const MachineInstr *MInst);
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};
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};
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