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Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -122,15 +122,13 @@ bool SparcInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *DestRC,
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const TargetRegisterClass *SrcRC) const {
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const TargetRegisterClass *SrcRC,
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DebugLoc DL) const {
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if (DestRC != SrcRC) {
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// Not yet supported!
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return false;
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}
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DebugLoc DL;
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if (I != MBB.end()) DL = I->getDebugLoc();
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if (DestRC == SP::IntRegsRegisterClass)
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BuildMI(MBB, I, DL, get(SP::ORrr), DestReg).addReg(SP::G0).addReg(SrcReg);
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else if (DestRC == SP::FPRegsRegisterClass)
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@@ -74,7 +74,8 @@ public:
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *DestRC,
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const TargetRegisterClass *SrcRC) const;
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const TargetRegisterClass *SrcRC,
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DebugLoc DL) const;
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virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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