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Tighten operand checking on CPS instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137172 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson
2011-08-09 23:05:39 +00:00
parent 438f68df35
commit 35008c2f8d
4 changed files with 7 additions and 2 deletions
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5
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@ -83,6 +83,8 @@ static bool DecodeMemMultipleWritebackInstruction(llvm::MCInst & Inst,
const void *Decoder);
static bool DecodeSMLAInstruction(llvm::MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder);
static bool DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder);
static bool DecodeAddrModeImm12Operand(llvm::MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static bool DecodeAddrMode5Operand(llvm::MCInst &Inst, unsigned Val,
@ -1139,6 +1141,9 @@ static bool DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn,
unsigned iflags = fieldFromInstruction32(Insn, 6, 3);
unsigned mode = fieldFromInstruction32(Insn, 0, 5);
// imod == '01' --> UNPREDICTABLE
if (imod == 1) return false;
if (M && mode && imod && iflags) {
Inst.setOpcode(ARM::CPS3p);
Inst.addOperand(MCOperand::CreateImm(imod));