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Fix PR16797 - Support PHINodes with multiple inputs from the same basic block.
Do not generate new vector values for the same entries because we know that the incoming values from the same block must be identical. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188185 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1187,10 +1187,21 @@ Value *BoUpSLP::vectorizeTree(TreeEntry *E) {
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PHINode *NewPhi = Builder.CreatePHI(VecTy, PH->getNumIncomingValues());
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E->VectorizedValue = NewPhi;
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// PHINodes may have multiple entries from the same block. We want to
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// visit every block once.
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SmallSet<BasicBlock*, 4> VisitedBBs;
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for (unsigned i = 0, e = PH->getNumIncomingValues(); i < e; ++i) {
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ValueList Operands;
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BasicBlock *IBB = PH->getIncomingBlock(i);
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if (VisitedBBs.count(IBB)) {
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NewPhi->addIncoming(NewPhi->getIncomingValueForBlock(IBB), IBB);
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continue;
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}
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VisitedBBs.insert(IBB);
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// Prepare the operand vector.
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for (unsigned j = 0; j < E->Scalars.size(); ++j)
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Operands.push_back(cast<PHINode>(E->Scalars[j])->
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41
test/Transforms/SLPVectorizer/X86/crash_netbsd_decompress.ll
Normal file
41
test/Transforms/SLPVectorizer/X86/crash_netbsd_decompress.ll
Normal file
@ -0,0 +1,41 @@
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; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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%struct.DState = type { i32, i32 }
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@b = common global %struct.DState zeroinitializer, align 4
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@d = common global i32 0, align 4
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@c = common global i32 0, align 4
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@a = common global i32 0, align 4
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@e = common global i32 0, align 4
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define i32 @fn1() {
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entry:
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%0 = load i32* getelementptr inbounds (%struct.DState* @b, i32 0, i32 0), align 4
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%1 = load i32* getelementptr inbounds (%struct.DState* @b, i32 0, i32 1), align 4
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%2 = load i32* @d, align 4
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%cond = icmp eq i32 %2, 0
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br i1 %cond, label %sw.bb, label %save_state_and_return
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sw.bb: ; preds = %entry
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%3 = load i32* @c, align 4
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%and = and i32 %3, 7
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store i32 %and, i32* @a, align 4
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switch i32 %and, label %if.end [
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i32 7, label %save_state_and_return
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i32 0, label %save_state_and_return
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]
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if.end: ; preds = %sw.bb
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br label %save_state_and_return
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save_state_and_return: ; preds = %sw.bb, %sw.bb, %if.end, %entry
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%t.0 = phi i32 [ 0, %if.end ], [ %0, %entry ], [ %0, %sw.bb ], [ %0, %sw.bb ]
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%f.0 = phi i32 [ 0, %if.end ], [ %1, %entry ], [ 0, %sw.bb ], [ 0, %sw.bb ]
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store i32 %t.0, i32* getelementptr inbounds (%struct.DState* @b, i32 0, i32 0), align 4
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store i32 %f.0, i32* getelementptr inbounds (%struct.DState* @b, i32 0, i32 1), align 4
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ret i32 undef
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}
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