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Type::getPrimitiveID() -> getTypeID()

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14288 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2004-06-21 17:25:55 +00:00
parent d71bd56caa
commit 358829f151
2 changed files with 8 additions and 8 deletions
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8
lib/Target/PowerPC/PPC32ISelSimple.cpp
View File

@ -39,7 +39,7 @@ namespace {
/// size of the type, and whether or not it is floating point.
///
static inline TypeClass getClass(const Type *Ty) {
switch (Ty->getPrimitiveID()) {
switch (Ty->getTypeID()) {
case Type::SByteTyID:
case Type::UByteTyID: return cByte; // Byte operands are class #0
case Type::ShortTyID:
@ -2306,7 +2306,7 @@ void ISel::emitCastOperation(MachineBasicBlock *BB,
}
unsigned TmpReg = makeAnotherReg(Type::IntTy);
switch (SrcTy->getPrimitiveID()) {
switch (SrcTy->getTypeID()) {
case Type::BoolTyID:
case Type::SByteTyID:
BuildMI(*BB, IP, PPC32::EXTSB, 1, TmpReg).addReg(SrcReg);
@ -2411,7 +2411,7 @@ void ISel::visitVANextInst(VANextInst &I) {
unsigned DestReg = getReg(I);
unsigned Size;
switch (I.getArgType()->getPrimitiveID()) {
switch (I.getArgType()->getTypeID()) {
default:
std::cerr << I;
assert(0 && "Error: bad type for va_next instruction!");
@ -2436,7 +2436,7 @@ void ISel::visitVAArgInst(VAArgInst &I) {
unsigned VAList = getReg(I.getOperand(0));
unsigned DestReg = getReg(I);
switch (I.getType()->getPrimitiveID()) {
switch (I.getType()->getTypeID()) {
default:
std::cerr << I;
assert(0 && "Error: bad type for va_next instruction!");

8
lib/Target/PowerPC/PowerPCISelSimple.cpp
View File

@ -39,7 +39,7 @@ namespace {
/// size of the type, and whether or not it is floating point.
///
static inline TypeClass getClass(const Type *Ty) {
switch (Ty->getPrimitiveID()) {
switch (Ty->getTypeID()) {
case Type::SByteTyID:
case Type::UByteTyID: return cByte; // Byte operands are class #0
case Type::ShortTyID:
@ -2306,7 +2306,7 @@ void ISel::emitCastOperation(MachineBasicBlock *BB,
}
unsigned TmpReg = makeAnotherReg(Type::IntTy);
switch (SrcTy->getPrimitiveID()) {
switch (SrcTy->getTypeID()) {
case Type::BoolTyID:
case Type::SByteTyID:
BuildMI(*BB, IP, PPC32::EXTSB, 1, TmpReg).addReg(SrcReg);
@ -2411,7 +2411,7 @@ void ISel::visitVANextInst(VANextInst &I) {
unsigned DestReg = getReg(I);
unsigned Size;
switch (I.getArgType()->getPrimitiveID()) {
switch (I.getArgType()->getTypeID()) {
default:
std::cerr << I;
assert(0 && "Error: bad type for va_next instruction!");
@ -2436,7 +2436,7 @@ void ISel::visitVAArgInst(VAArgInst &I) {
unsigned VAList = getReg(I.getOperand(0));
unsigned DestReg = getReg(I);
switch (I.getType()->getPrimitiveID()) {
switch (I.getType()->getTypeID()) {
default:
std::cerr << I;
assert(0 && "Error: bad type for va_next instruction!");