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Last change for mips16 prolog/epilog cleanup and optimization.

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Some tiny cosmetic code changes to follow. Because of the wide
ranging nature of the patch a full 24 test cycle was needed to
check against regression. This was the smallest patch I could
make to progress from the earlier ones in the series. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197350 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reed Kotler
2013-12-15 20:49:30 +00:00
parent 08e647a771
commit 3589b7b808
21 changed files with 153 additions and 237 deletions
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46
lib/Target/Mips/Mips16FrameLowering.cpp
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@@ -54,35 +54,24 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const {
MMI.addFrameInst(
MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize));
const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
if (CSI.size()) {
MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
BuildMI(MBB, MBBI, dl,
TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
const MipsRegisterInfo &RI = TII.getRegisterInfo();
const BitVector Reserved = RI.getReservedRegs(MF);
bool SaveS2 = Reserved[Mips::S2];
int Offset=-4;
unsigned RA = MRI->getDwarfRegNum(Mips::RA, true);
MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, RA, Offset));
Offset -= 4;
const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
if (SaveS2) {
unsigned S2 = MRI->getDwarfRegNum(Mips::S2, true);
MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S2, Offset));
Offset -= 4;
for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
E = CSI.end(); I != E; ++I) {
int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
unsigned Reg = I->getReg();
unsigned DReg = MRI->getDwarfRegNum(Reg, true);
MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, DReg, Offset));
}
}
unsigned S1 = MRI->getDwarfRegNum(Mips::S1, true);
MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, Offset));
Offset -= 4;
unsigned S0 = MRI->getDwarfRegNum(Mips::S0, true);
MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, Offset));
if (hasFP(MF))
BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
.addReg(Mips::SP);
@@ -183,10 +172,15 @@ Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
void Mips16FrameLowering::
processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
RegScavenger *RS) const {
MF.getRegInfo().setPhysRegUsed(Mips::RA);
MF.getRegInfo().setPhysRegUsed(Mips::S0);
MF.getRegInfo().setPhysRegUsed(Mips::S1);
MF.getRegInfo().setPhysRegUsed(Mips::S2);
const Mips16InstrInfo &TII =
*static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
const MipsRegisterInfo &RI = TII.getRegisterInfo();
const BitVector Reserved = RI.getReservedRegs(MF);
bool SaveS2 = Reserved[Mips::S2];
if (SaveS2)
MF.getRegInfo().setPhysRegUsed(Mips::S2);
if (hasFP(MF))
MF.getRegInfo().setPhysRegUsed(Mips::S0);
}
const MipsFrameLowering *