mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-27 13:30:05 +00:00
Last change for mips16 prolog/epilog cleanup and optimization.
Some tiny cosmetic code changes to follow. Because of the wide ranging nature of the patch a full 24 test cycle was needed to check against regression. This was the smallest patch I could make to progress from the earlier ones in the series. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197350 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reed Kotler
parent
08e647a771
commit
3589b7b808
@ -54,35 +54,24 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const {
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MMI.addFrameInst(
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MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize));
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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if (CSI.size()) {
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MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, dl,
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TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
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const MipsRegisterInfo &RI = TII.getRegisterInfo();
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const BitVector Reserved = RI.getReservedRegs(MF);
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bool SaveS2 = Reserved[Mips::S2];
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int Offset=-4;
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unsigned RA = MRI->getDwarfRegNum(Mips::RA, true);
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MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, RA, Offset));
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Offset -= 4;
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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if (SaveS2) {
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unsigned S2 = MRI->getDwarfRegNum(Mips::S2, true);
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MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S2, Offset));
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Offset -= 4;
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for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
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E = CSI.end(); I != E; ++I) {
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int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
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unsigned Reg = I->getReg();
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unsigned DReg = MRI->getDwarfRegNum(Reg, true);
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MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, DReg, Offset));
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}
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}
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unsigned S1 = MRI->getDwarfRegNum(Mips::S1, true);
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MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, Offset));
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Offset -= 4;
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unsigned S0 = MRI->getDwarfRegNum(Mips::S0, true);
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MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, Offset));
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if (hasFP(MF))
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BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
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.addReg(Mips::SP);
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@ -183,10 +172,15 @@ Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
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void Mips16FrameLowering::
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processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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RegScavenger *RS) const {
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MF.getRegInfo().setPhysRegUsed(Mips::RA);
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MF.getRegInfo().setPhysRegUsed(Mips::S0);
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MF.getRegInfo().setPhysRegUsed(Mips::S1);
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const Mips16InstrInfo &TII =
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*static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
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const MipsRegisterInfo &RI = TII.getRegisterInfo();
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const BitVector Reserved = RI.getReservedRegs(MF);
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bool SaveS2 = Reserved[Mips::S2];
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if (SaveS2)
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MF.getRegInfo().setPhysRegUsed(Mips::S2);
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if (hasFP(MF))
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MF.getRegInfo().setPhysRegUsed(Mips::S0);
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}
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const MipsFrameLowering *
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@ -169,35 +169,59 @@ unsigned Mips16InstrInfo::getOppositeBranchOpc(unsigned Opc) const {
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return 0;
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}
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static void addSaveRestoreRegs(MachineInstrBuilder &MIB,
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const std::vector<CalleeSavedInfo> &CSI, unsigned Flags=0) {
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if (CSI.size()==0) return;
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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// Add the callee-saved register as live-in. Do not add if the register is
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// RA and return address is taken, because it has already been added in
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// method MipsTargetLowering::LowerRETURNADDR.
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// It's killed at the spill, unless the register is RA and return address
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// is taken.
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unsigned Reg = CSI[e-i-1].getReg();
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switch (Reg) {
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case Mips::RA:
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case Mips::S0:
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case Mips::S1:
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MIB.addReg(Reg, Flags);
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break;
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case Mips::S2:
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break;
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default:
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llvm_unreachable("unexpected mips16 callee saved register");
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}
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}
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}
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// Adjust SP by FrameSize bytes. Save RA, S0, S1
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void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
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const BitVector Reserved = RI.getReservedRegs(*MBB.getParent());
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MachineFunction &MF = *MBB.getParent();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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const BitVector Reserved = RI.getReservedRegs(MF);
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bool SaveS2 = Reserved[Mips::S2];
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MachineInstrBuilder MIB;
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unsigned Opc = ((FrameSize <= 128) && !SaveS2)? Mips::Save16:Mips::SaveX16;
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MIB = BuildMI(MBB, I, DL, get(Opc));
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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addSaveRestoreRegs(MIB, CSI);
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if (SaveS2)
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MIB.addReg(Mips::S2);
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if (isUInt<11>(FrameSize))
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MIB = BuildMI(
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MBB, I, DL, get(Opc)).addReg(Mips::RA).
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addReg(Mips::S0).
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addReg(Mips::S1).addImm(FrameSize);
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MIB.addImm(FrameSize);
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else {
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int Base = 2040; // should create template function like isUInt that
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// returns largest possible n bit unsigned integer
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int64_t Remainder = FrameSize - Base;
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MIB = BuildMI(
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MBB, I, DL, get(Opc)).addReg(Mips::RA).
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addReg(Mips::S0).
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addReg(Mips::S1).addImm(Base);
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MIB.addImm(Base);
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if (isInt<16>(-Remainder))
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BuildAddiuSpImm(MBB, I, -Remainder);
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else
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adjustStackPtrBig(SP, -Remainder, MBB, I, Mips::V0, Mips::V1);
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}
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if (SaveS2)
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MIB.addReg(Mips::S2);
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}
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// Adjust SP by FrameSize bytes. Restore RA, S0, S1
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@ -205,35 +229,31 @@ void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
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const BitVector Reserved = RI.getReservedRegs(*MBB.getParent());
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MachineFunction *MF = MBB.getParent();
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MachineFrameInfo *MFI = MF->getFrameInfo();
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const BitVector Reserved = RI.getReservedRegs(*MF);
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bool SaveS2 = Reserved[Mips::S2];
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MachineInstrBuilder MIB;
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unsigned Opc = ((FrameSize <= 128) && !SaveS2)?
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Mips::Restore16:Mips::RestoreX16;
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if (isUInt<11>(FrameSize))
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MIB = BuildMI(
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MBB, I, DL, get(Opc)).
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addReg(Mips::RA, RegState::Define).
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addReg(Mips::S0, RegState::Define).
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addReg(Mips::S1, RegState::Define).
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addImm(FrameSize);
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else {
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int Base = 2040; // should create template function like isUInt that
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// returns largest possible n bit unsigned integer
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if (!isUInt<11>(FrameSize)) {
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unsigned Base = 2040;
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int64_t Remainder = FrameSize - Base;
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FrameSize = Base; // should create template function like isUInt that
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// returns largest possible n bit unsigned integer
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if (isInt<16>(Remainder))
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BuildAddiuSpImm(MBB, I, Remainder);
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else
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adjustStackPtrBig(SP, Remainder, MBB, I, Mips::A0, Mips::A1);
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MIB = BuildMI(
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MBB, I, DL, get(Opc)).
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addReg(Mips::RA, RegState::Define).
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addReg(Mips::S0, RegState::Define).
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addReg(Mips::S1, RegState::Define).
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addImm(Base);
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}
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MIB = BuildMI(MBB, I, DL, get(Opc));
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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addSaveRestoreRegs(MIB, CSI, RegState::Define);
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if (SaveS2)
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MIB.addReg(Mips::S2, RegState::Define);
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MIB.addImm(FrameSize);
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}
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// Adjust SP by Amount bytes where bytes can be up to 32bit number.
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@ -1376,7 +1376,9 @@ def: Mips16Pat<
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let isCall=1, hasDelaySlot=0 in
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def JumpLinkReg16:
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FRR16_JALRC<0, 0, 0, (outs), (ins CPU16Regs:$rs),
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"jalrc \t$rs", [(MipsJmpLink CPU16Regs:$rs)], IIBranch>;
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"jalrc \t$rs", [(MipsJmpLink CPU16Regs:$rs)], IIBranch> {
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let Defs = [RA];
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}
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// Mips16 pseudos
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let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1, hasCtrlDep=1,
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@ -1892,7 +1894,7 @@ def GotPrologue16:
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MipsPseudo16<
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(outs CPU16Regs:$rh, CPU16Regs:$rl),
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(ins simm16:$immHi, simm16:$immLo),
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".align 2\n\tli\t$rh, $immHi\n\taddiu\t$rl, $$pc, $immLo\n ",[]> ;
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"\tli\t$rh, $immHi\n\taddiu\t$rl, $$pc, $immLo\n ",[]> ;
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// An operand for the CONSTPOOL_ENTRY pseudo-instruction.
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def cpinst_operand : Operand<i32> {
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@ -246,4 +246,6 @@ def CSR_N64 : CalleeSavedRegs<(add (sequence "D%u_64", 31, 24), RA_64, FP_64,
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GP_64, (sequence "S%u_64", 7, 0))>;
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def CSR_Mips16RetHelper :
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CalleeSavedRegs<(add V0, V1, (sequence "A%u", 3, 0), S0, S1)>;
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CalleeSavedRegs<(add V0, V1, FP,
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(sequence "A%u", 3, 0), (sequence "S%u", 7, 0),
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(sequence "D%u", 15, 10))>;
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@ -25,7 +25,7 @@ entry:
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call void @p(i32* %arrayidx1)
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ret void
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}
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; 16: save $ra, $16, $17, 2040
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; 16: addiu $sp, -56 # 16 bit inst
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; 16: addiu $sp, 56 # 16 bit inst
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; 16: restore $ra, $16, $17, 2040
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; 16: save $ra, 2040
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; 16: addiu $sp, -40 # 16 bit inst
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; 16: addiu $sp, 40 # 16 bit inst
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; 16: restore $ra, 2040
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@ -19,8 +19,8 @@ entry:
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define void @test() nounwind {
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entry:
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; 16: .frame $sp,24,$ra
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; 16: save $ra, $16, $17, 24
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; 16: .frame $sp,8,$ra
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; 16: save 8 # 16 bit inst
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; 16: move $16, $sp
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; 16: move ${{[0-9]+}}, $sp
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; 16: subu $[[REGISTER:[0-9]+]], ${{[0-9]+}}, ${{[0-9]+}}
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@ -6,8 +6,8 @@
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define i32 @main() {
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; 16-LABEL: main:
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; 16: .cfi_startproc
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; 16: save $ra, $16, $17, 40
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; 16: .cfi_def_cfa_offset 40
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; 16: save $16, $17, $ra, 32 # 16 bit inst
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; 16: .cfi_def_cfa_offset 32
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; 16: .cfi_offset 31, -4
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; 16: .cfi_offset 17, -8
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; 16: .cfi_offset 16, -12
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@ -17,7 +17,7 @@ entry:
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; fmask1: .set reorder
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; fmask1: .end foo1
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; fmask2: .ent foo1
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; fmask2: save {{.*}}
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; fmask2: jrc $ra
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; fmask2: .end foo1
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; fmask1nr: .ent foo1
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; fmask1nr: .set noreorder
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@ -42,10 +42,10 @@ entry:
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; fmask2: .set reorder
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; fmask2: .end foo2
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; fmask1: .ent foo2
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; fmask1: save {{.*}}
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; fmask1: jrc $ra
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; fmask1: .end foo2
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; fmask1nr: .ent foo2
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; fmask1nr: save {{.*}}
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; fmask1nr: jrc $ra
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; fmask1nr: .end foo2
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}
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@ -62,10 +62,10 @@ entry:
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; fmask1: .set reorder
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; fmask1: .end foo3
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; fmask2: .ent foo3
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; fmask2: save {{.*}}
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; fmask2: jrc $ra
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; fmask2: .end foo3
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; fmask1r: .ent foo3
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; fmask1r: save {{.*}}
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; fmask1r: jrc $ra
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; fmask1r: .end foo3
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}
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@ -82,10 +82,10 @@ entry:
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; fmask2: .set reorder
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; fmask2: .end foo4
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; fmask1: .ent foo4
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; fmask1: save {{.*}}
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; fmask1: jrc $ra
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; fmask1: .end foo4
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; fmask1nr: .ent foo4
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; fmask1nr: save {{.*}}
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; fmask1nr: jrc $ra
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; fmask1nr: .end foo4
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}
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@ -25,10 +25,9 @@ entry:
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; SR32: .set noreorder
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; SR32: .set nomacro
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; SR32: .set noat
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; SR: save $ra, $16, $17, [[FS:[0-9]+]]
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; SR: save $ra, 24 # 16 bit inst
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; PE: .ent main
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; PE: .align 2
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; PE-NEXT: li $[[T1:[0-9]+]], %hi(_gp_disp)
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; PE: li $[[T1:[0-9]+]], %hi(_gp_disp)
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; PE-NEXT: addiu $[[T2:[0-9]+]], $pc, %lo(_gp_disp)
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; PE: sll $[[T3:[0-9]+]], $[[T1]], 16
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; C1: lw ${{[0-9]+}}, %got($.str)(${{[0-9]+}})
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@ -37,7 +36,7 @@ entry:
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; C2: move $25, ${{[0-9]+}}
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; C1: move $gp, ${{[0-9]+}}
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; C1: jalrc ${{[0-9]+}}
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; SR: restore $ra, $16, $17, [[FS]]
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; SR: restore $ra, 24 # 16 bit inst
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; PE: li $2, 0
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; PE: jrc $ra
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@ -1,76 +0,0 @@
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static -mips16-constant-islands=false < %s | FileCheck %s -check-prefix=1
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=pic < %s | FileCheck %s -check-prefix=ci
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@i = common global i32 0, align 4
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@j = common global i32 0, align 4
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@.str = private unnamed_addr constant [8 x i8] c"%i %i \0A\00", align 1
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define void @foo(i32* %p, i32 %i, i32 %j) nounwind {
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entry:
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%p.addr = alloca i32*, align 4
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%i.addr = alloca i32, align 4
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%j.addr = alloca i32, align 4
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store i32* %p, i32** %p.addr, align 4
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store i32 %i, i32* %i.addr, align 4
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store i32 %j, i32* %j.addr, align 4
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%0 = load i32* %j.addr, align 4
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%1 = load i32** %p.addr, align 4
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%2 = load i32* %i.addr, align 4
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%add.ptr = getelementptr inbounds i32* %1, i32 %2
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store i32 %0, i32* %add.ptr, align 4
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ret void
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}
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define i32 @main() nounwind {
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entry:
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; 1-LABEL: main:
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; 1: 1: .word -798000
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; 1: lw ${{[0-9]+}}, 1f
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; 1: b 2f
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; 1: .align 2
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; 1: .word 800020
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; 1: b 2f
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; 1: .align 2
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; 1: .word 400020
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; 1: move ${{[0-9]+}}, $sp
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; 1: addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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; 1: addiu ${{[0-9]+}}, ${{[0-9]+}}, 0
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; 1: b 2f
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; 1: .align 2
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; 1: .word 400220
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; 1: move ${{[0-9]+}}, $sp
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; 1: addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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; 1: lw ${{[0-9]+}}, 0(${{[0-9]+}})
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%retval = alloca i32, align 4
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%one = alloca [100000 x i32], align 4
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%two = alloca [100000 x i32], align 4
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store i32 0, i32* %retval
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%arrayidx = getelementptr inbounds [100000 x i32]* %one, i32 0, i32 0
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call void @foo(i32* %arrayidx, i32 50, i32 9999)
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%arrayidx1 = getelementptr inbounds [100000 x i32]* %two, i32 0, i32 0
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call void @foo(i32* %arrayidx1, i32 99999, i32 5555)
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%arrayidx2 = getelementptr inbounds [100000 x i32]* %one, i32 0, i32 50
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%0 = load i32* %arrayidx2, align 4
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store i32 %0, i32* @i, align 4
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%arrayidx3 = getelementptr inbounds [100000 x i32]* %two, i32 0, i32 99999
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%1 = load i32* %arrayidx3, align 4
|
||||
store i32 %1, i32* @j, align 4
|
||||
%2 = load i32* @i, align 4
|
||||
%3 = load i32* @j, align 4
|
||||
%call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([8 x i8]* @.str, i32 0, i32 0), i32 %2, i32 %3)
|
||||
ret i32 0
|
||||
}
|
||||
|
||||
; ci: lw ${{[0-9]+}}, $CPI{{[0-9]+}}_{{[0-9]+}}
|
||||
declare i32 @printf(i8*, ...)
|
||||
@ -8,7 +8,6 @@ entry:
|
||||
|
||||
; CHECK: .set mips16 # @foo
|
||||
; CHECK: .ent foo
|
||||
; CHECK: save {{.+}}
|
||||
; CHECK: restore {{.+}}
|
||||
; CHECK: jrc $ra
|
||||
; CHECK: .end foo
|
||||
attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
|
||||
|
||||
@ -24,8 +24,7 @@ entry:
|
||||
; 16: .set mips16 # @nofoo
|
||||
; 16: .ent nofoo
|
||||
|
||||
; 16: save {{.+}}
|
||||
; 16: restore {{.+}}
|
||||
; 16: jrc $ra
|
||||
; 16: .end nofoo
|
||||
|
||||
define i32 @main() #2 {
|
||||
|
||||
@ -8,13 +8,11 @@ entry:
|
||||
|
||||
; 16: .set mips16 # @foo
|
||||
; 16: .ent foo
|
||||
; 16: save {{.+}}
|
||||
; 16: restore {{.+}}
|
||||
; 16: jrc $ra
|
||||
; 16: .end foo
|
||||
; 32: .set mips16 # @foo
|
||||
; 32: .ent foo
|
||||
; 32: save {{.+}}
|
||||
; 32: restore {{.+}}
|
||||
; 32: jrc $ra
|
||||
; 32: .end foo
|
||||
define void @nofoo() #1 {
|
||||
entry:
|
||||
@ -50,8 +48,7 @@ entry:
|
||||
|
||||
; 16: .set mips16 # @main
|
||||
; 16: .ent main
|
||||
; 16: save {{.+}}
|
||||
; 16: restore {{.+}}
|
||||
; 16: jrc $ra
|
||||
; 16: .end main
|
||||
; 32: .set nomips16 # @main
|
||||
; 32: .ent main
|
||||
|
||||
@ -8,13 +8,11 @@ entry:
|
||||
|
||||
; 16: .set mips16 # @foo
|
||||
; 16: .ent foo
|
||||
; 16: save {{.+}}
|
||||
; 16: restore {{.+}}
|
||||
; 16: jrc $ra
|
||||
; 16: .end foo
|
||||
; 32: .set mips16 # @foo
|
||||
; 32: .ent foo
|
||||
; 32: save {{.+}}
|
||||
; 32: restore {{.+}}
|
||||
; 32: jrc $ra
|
||||
; 32: .end foo
|
||||
define void @nofoo() #1 {
|
||||
entry:
|
||||
@ -50,13 +48,11 @@ entry:
|
||||
|
||||
; 16: .set mips16 # @main
|
||||
; 16: .ent main
|
||||
; 16: save {{.+}}
|
||||
; 16: restore {{.+}}
|
||||
; 16: jrc $ra
|
||||
; 16: .end main
|
||||
; 32: .set mips16 # @main
|
||||
; 32: .ent main
|
||||
; 32: save {{.+}}
|
||||
; 32: restore {{.+}}
|
||||
; 32: jrc $ra
|
||||
; 32: .end main
|
||||
|
||||
|
||||
|
||||
@ -8,13 +8,11 @@ entry:
|
||||
|
||||
; 16: .set mips16 # @foo
|
||||
; 16: .ent foo
|
||||
; 16: save {{.+}}
|
||||
; 16: restore {{.+}}
|
||||
; 16: jrc $ra
|
||||
; 16: .end foo
|
||||
; 32: .set mips16 # @foo
|
||||
; 32: .ent foo
|
||||
; 32: save {{.+}}
|
||||
; 32: restore {{.+}}
|
||||
; 32: jrc $ra
|
||||
; 32: .end foo
|
||||
define void @nofoo() #1 {
|
||||
entry:
|
||||
|
||||
@ -8,8 +8,7 @@ entry:
|
||||
|
||||
; 16: .set mips16 # @foo
|
||||
; 16: .ent foo
|
||||
; 16: save {{.+}}
|
||||
; 16: restore {{.+}}
|
||||
; 16: jrc $ra
|
||||
; 16: .end foo
|
||||
; 32: .set nomips16 # @foo
|
||||
; 32: .ent foo
|
||||
|
||||
@ -8,8 +8,7 @@ entry:
|
||||
|
||||
; 16: .set mips16 # @foo
|
||||
; 16: .ent foo
|
||||
; 16: save {{.+}}
|
||||
; 16: restore {{.+}}
|
||||
; 16: jrc $ra
|
||||
; 16: .end foo
|
||||
; 32: .set nomips16 # @foo
|
||||
; 32: .ent foo
|
||||
@ -56,14 +55,12 @@ entry:
|
||||
|
||||
; 16: .set mips16 # @main
|
||||
; 16: .ent main
|
||||
; 16: save {{.+}}
|
||||
; 16: restore {{.+}}
|
||||
; 16: jrc $ra
|
||||
; 16: .end main
|
||||
|
||||
; 32: .set mips16 # @main
|
||||
; 32: .ent main
|
||||
; 32: save {{.+}}
|
||||
; 32: restore {{.+}}
|
||||
; 32: jrc $ra
|
||||
; 32: .end main
|
||||
|
||||
|
||||
|
||||
@ -16,8 +16,7 @@ entry:
|
||||
|
||||
; 32: .set mips16 # @foo
|
||||
; 32: .ent foo
|
||||
; 32: save {{.+}}
|
||||
; 32: restore {{.+}}
|
||||
; 32: jrc $ra
|
||||
; 32: .end foo
|
||||
|
||||
define void @nofoo() #1 {
|
||||
|
||||
@ -7,8 +7,7 @@ entry:
|
||||
|
||||
; 32: .set mips16 # @foo
|
||||
; 32: .ent foo
|
||||
; 32: save {{.+}}
|
||||
; 32: restore {{.+}}
|
||||
; 32: jrc $ra
|
||||
; 32: .end foo
|
||||
define void @nofoo() #1 {
|
||||
entry:
|
||||
@ -33,8 +32,7 @@ entry:
|
||||
|
||||
; 32: .set mips16 # @main
|
||||
; 32: .ent main
|
||||
; 32: save {{.+}}
|
||||
; 32: restore {{.+}}
|
||||
; 32: jrc $ra
|
||||
; 32: .end main
|
||||
|
||||
|
||||
|
||||
@ -1,10 +1,7 @@
|
||||
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=NEG
|
||||
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC
|
||||
|
||||
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=NEG
|
||||
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC
|
||||
|
||||
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s
|
||||
|
||||
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s
|
||||
|
||||
@xi = common global i32 0, align 4
|
||||
@x = common global float 0.000000e+00, align 4
|
||||
@ -16,14 +13,14 @@ entry:
|
||||
%call = call i32 @i(i32 1)
|
||||
store i32 %call, i32* @xi, align 4
|
||||
ret void
|
||||
; CHECK: .ent it
|
||||
; NEG: .ent it
|
||||
; CHECK: save $ra, $16, $17, [[FS:[0-9]+]]
|
||||
; NEG-NOT: save $ra, $16, $17, [[FS:[0-9]+]], $18
|
||||
; CHECK: restore $ra, $16, $17, [[FS]]
|
||||
; NEG-NOT: restore $ra, $16, $17, [[FS:[0-9]+]], $18
|
||||
; CHECK: .end it
|
||||
; NEG: .end it
|
||||
; PIC: .ent it
|
||||
; STATIC: .ent it
|
||||
; PIC: save $16, $17, $ra, [[FS:[0-9]+]]
|
||||
; STATIC: save $16, $ra, [[FS:[0-9]+]]
|
||||
; PIC: restore $16, $17, $ra, [[FS]]
|
||||
; STATIC: restore $16, $ra, [[FS]]
|
||||
; PIC: .end it
|
||||
; STATIC: .end it
|
||||
}
|
||||
|
||||
declare i32 @i(i32) #1
|
||||
@ -34,10 +31,10 @@ entry:
|
||||
%call = call float @f()
|
||||
store float %call, float* @x, align 4
|
||||
ret void
|
||||
; CHECK: .ent ft
|
||||
; CHECK: save $ra, $16, $17, [[FS:[0-9]+]], $18
|
||||
; CHECK: restore $ra, $16, $17, [[FS]], $18
|
||||
; CHECK: .end ft
|
||||
; PIC: .ent ft
|
||||
; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
|
||||
; PIC: restore $16, $17, $ra, $18, [[FS]]
|
||||
; PIC: .end ft
|
||||
}
|
||||
|
||||
declare float @f() #1
|
||||
@ -48,10 +45,10 @@ entry:
|
||||
%call = call double @d()
|
||||
store double %call, double* @xd, align 8
|
||||
ret void
|
||||
; CHECK: .ent dt
|
||||
; CHECK: save $ra, $16, $17, [[FS:[0-9]+]], $18
|
||||
; CHECK: restore $ra, $16, $17, [[FS]], $18
|
||||
; CHECK: .end dt
|
||||
; PIC: .ent dt
|
||||
; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
|
||||
; PIC: restore $16, $17, $ra, $18, [[FS]]
|
||||
; PIC: .end dt
|
||||
}
|
||||
|
||||
declare double @d() #1
|
||||
@ -63,10 +60,10 @@ entry:
|
||||
%call = call float @ff(float %0)
|
||||
store float %call, float* @x, align 4
|
||||
ret void
|
||||
; CHECK: .ent fft
|
||||
; CHECK: save $ra, $16, $17, [[FS:[0-9]+]], $18
|
||||
; CHECK: restore $ra, $16, $17, [[FS]], $18
|
||||
; CHECK: .end fft
|
||||
; PIC: .ent fft
|
||||
; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
|
||||
; PIC: restore $16, $17, $ra, $18, [[FS]]
|
||||
; PIC: .end fft
|
||||
}
|
||||
|
||||
declare float @ff(float) #1
|
||||
@ -77,14 +74,14 @@ entry:
|
||||
%0 = load float* @x, align 4
|
||||
call void @vf(float %0)
|
||||
ret void
|
||||
; CHECK: .ent vft
|
||||
; NEG: .ent vft
|
||||
; CHECK: save $ra, $16, $17, [[FS:[0-9]+]]
|
||||
; NEG-NOT: save $ra, $16, $17, [[FS:[0-9]+]], $18
|
||||
; CHECK: restore $ra, $16, $17, [[FS]]
|
||||
; NEG-NOT: restore $ra, $16, $17, [[FS:[0-9]+]], $18
|
||||
; CHECK: .end vft
|
||||
; NEG: .end vft
|
||||
; PIC: .ent vft
|
||||
; STATIC: .ent vft
|
||||
; PIC: save $16, $ra, [[FS:[0-9]+]]
|
||||
; STATIC: save $16, $ra, [[FS:[0-9]+]]
|
||||
; PIC: restore $16, $ra, [[FS]]
|
||||
; STATIC: restore $16, $ra, [[FS]]
|
||||
; PIC: .end vft
|
||||
; STATIC: .end vft
|
||||
}
|
||||
|
||||
declare void @vf(float) #1
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=NEG
|
||||
|
||||
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s
|
||||
|
||||
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=NEG
|
||||
|
||||
@f = common global float 0.000000e+00, align 4
|
||||
|
||||
; Function Attrs: nounwind
|
||||
@ -14,8 +14,8 @@ entry:
|
||||
call void @x(i8* %arraydecay1)
|
||||
ret void
|
||||
; CHECK: .ent foo1
|
||||
; CHECK: save $ra, $16, $17, [[FS:[0-9]+]] # 16 bit inst
|
||||
; CHECK: restore $ra, $16, $17, [[FS]]
|
||||
; CHECK: save $16, $17, $ra, [[FS:[0-9]+]] # 16 bit inst
|
||||
; CHECK: restore $16, $17, $ra, [[FS]] # 16 bit inst
|
||||
; CHECK: .end foo1
|
||||
}
|
||||
|
||||
@ -31,13 +31,9 @@ entry:
|
||||
call void @x(i8* %arraydecay1)
|
||||
ret void
|
||||
; CHECK: .ent foo2
|
||||
; CHECK: save $ra, $16, $17, [[FS:[0-9]+]]
|
||||
; CHECK: restore $ra, $16, $17, [[FS]]
|
||||
; CHECK: save $16, $17, $ra, [[FS:[0-9]+]]
|
||||
; CHECK: restore $16, $17, $ra, [[FS]]
|
||||
; CHECK: .end foo2
|
||||
; NEG: .ent foo2
|
||||
; NEG-NOT: save $ra, $16, $17, [[FS:[0-9]+]] # 16 bit inst
|
||||
; NEG-NOT: restore $ra, $16, $17, [[FS]] # 16 bit inst
|
||||
; NEG: .end foo2
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind
|
||||
@ -47,12 +43,12 @@ entry:
|
||||
store float %call, float* @f, align 4
|
||||
ret void
|
||||
; CHECK: .ent foo3
|
||||
; CHECK: save $ra, $16, $17, [[FS:[0-9]+]], $18
|
||||
; CHECK: restore $ra, $16, $17, [[FS]], $18
|
||||
; CHECK: save $16, $17, $ra, $18, [[FS:[0-9]+]]
|
||||
; CHECK: restore $16, $17, $ra, $18, [[FS]]
|
||||
; CHECK: .end foo3
|
||||
; NEG: .ent foo3
|
||||
; NEG-NOT: save $ra, $16, $17, [[FS:[0-9]+]], $18 # 16 bit inst
|
||||
; NEG-NOT: restore $ra, $16, $17, [[FS]], $18 # 16 bit inst
|
||||
; NEG-NOT: save $16, $17, $ra, $18, [[FS:[0-9]+]] # 16 bit inst
|
||||
; NEG-NOT: restore $16, $17, $ra, $18, [[FS]] # 16 bit inst
|
||||
; NEG: .end foo3
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user