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call computeRegisterProperties

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29780 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2006-08-20 01:49:49 +00:00
parent b31950ddfa
commit 3717ca965b
1 changed files with 6 additions and 0 deletions
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6
lib/Target/ARM/ARMISelDAGToDAG.cpp
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@ -42,11 +42,17 @@ namespace {
ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
: TargetLowering(TM) {
addRegisterClass(MVT::i32, ARM::IntRegsRegisterClass);
//LLVM requires that a register class supports MVT::f64!
addRegisterClass(MVT::f64, ARM::IntRegsRegisterClass);
setOperationAction(ISD::RET, MVT::Other, Custom);
setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
setSchedulingPreference(SchedulingForRegPressure);
computeRegisterProperties();
}
namespace llvm {