6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-06 06:33:24 +00:00
Code Issues Projects Releases Wiki Activity

ldmxcsr and stmxcsr.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27506 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-04-08 00:47:44 +00:00
parent 85db0df76c
commit 372db540d9
1 changed files with 6 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/X86/X86InstrSSE.td
View File

@ -1538,9 +1538,13 @@ def MASKMOVQ : I<0xF7, MRMDestMem, (ops i64mem:$dst, VR64:$src),
def SFENCE : I<0xAE, MRM7m, (ops), def SFENCE : I<0xAE, MRM7m, (ops),
"sfence", []>, TB, Requires<[HasSSE1]>; "sfence", []>, TB, Requires<[HasSSE1]>;
// Load MXCSR register // MXCSR register
def LDMXCSR : I<0xAE, MRM2m, (ops i32mem:$src), def LDMXCSR : I<0xAE, MRM2m, (ops i32mem:$src),
"ldmxcsr {$src|$src}", []>, TB, Requires<[HasSSE1]>; "ldmxcsr $src",
[(int_x86_sse_ldmxcsr addr:$src)]>, TB, Requires<[HasSSE1]>;
def STMXCSR : I<0xAE, MRM3m, (ops i32mem:$dst),
"stmxcsr $dst",
[(int_x86_sse_stmxcsr addr:$dst)]>, TB, Requires<[HasSSE1]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Alias Instructions // Alias Instructions