mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-05 14:34:55 +00:00
Thumb assembly parsing and encoding for B.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137891 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
f6d3a4c7c4
commit
395b453bed
@ -3035,6 +3035,10 @@ processInstruction(MCInst &Inst,
|
||||
if (Inst.getOperand(3).getImm() < 8)
|
||||
Inst.setOpcode(ARM::tADDi3);
|
||||
break;
|
||||
case ARM::tBcc:
|
||||
// If the conditional is AL, we really want tB.
|
||||
if (Inst.getOperand(1).getImm() == ARMCC::AL)
|
||||
Inst.setOpcode(ARM::tB);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -76,3 +76,15 @@ _func:
|
||||
asrs r5, r2
|
||||
|
||||
@ CHECK: asrs r5, r2 @ encoding: [0x15,0x41]
|
||||
|
||||
|
||||
@------------------------------------------------------------------------------
|
||||
@ B
|
||||
@------------------------------------------------------------------------------
|
||||
b _baz
|
||||
beq _bar
|
||||
|
||||
@ CHECK: b _baz @ encoding: [A,0xe0'A']
|
||||
@ fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br
|
||||
@ CHECK: beq _bar @ encoding: [A,0xd0]
|
||||
@ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc
|
||||
|
Loading…
x
Reference in New Issue
Block a user