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Switch all register list clients to the new MC*Iterator interface.
No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -541,8 +541,8 @@ bool RAGreedy::canEvictInterference(LiveInterval &VirtReg, unsigned PhysReg,
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Cascade = NextCascade;
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EvictionCost Cost;
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for (const uint16_t *AliasI = TRI->getOverlaps(PhysReg); *AliasI; ++AliasI) {
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LiveIntervalUnion::Query &Q = query(VirtReg, *AliasI);
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for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) {
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LiveIntervalUnion::Query &Q = query(VirtReg, *AI);
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// If there is 10 or more interferences, chances are one is heavier.
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if (Q.collectInterferingVRegs(10) >= 10)
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return false;
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@@ -605,8 +605,8 @@ void RAGreedy::evictInterference(LiveInterval &VirtReg, unsigned PhysReg,
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DEBUG(dbgs() << "evicting " << PrintReg(PhysReg, TRI)
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<< " interference: Cascade " << Cascade << '\n');
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for (const uint16_t *AliasI = TRI->getOverlaps(PhysReg); *AliasI; ++AliasI) {
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LiveIntervalUnion::Query &Q = query(VirtReg, *AliasI);
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for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) {
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LiveIntervalUnion::Query &Q = query(VirtReg, *AI);
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assert(Q.seenAllInterferences() && "Didn't check all interfererences.");
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for (unsigned i = 0, e = Q.interferingVRegs().size(); i != e; ++i) {
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LiveInterval *Intf = Q.interferingVRegs()[i];
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@@ -1358,7 +1358,7 @@ void RAGreedy::calcGapWeights(unsigned PhysReg,
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GapWeight.assign(NumGaps, 0.0f);
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// Add interference from each overlapping register.
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for (const uint16_t *AI = TRI->getOverlaps(PhysReg); *AI; ++AI) {
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for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) {
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if (!query(const_cast<LiveInterval&>(SA->getParent()), *AI)
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.checkInterference())
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continue;
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