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CSE: allow PerformTrivialCoalescing to check copies across basic block
boundaries. Given the following case: BB0 %vreg1<def> = SUBrr %vreg0, %vreg7 %vreg2<def> = COPY %vreg7 BB1 %vreg10<def> = SUBrr %vreg0, %vreg2 We should be able to CSE between SUBrr in BB0 and SUBrr in BB1. rdar://12462006 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168717 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -126,8 +126,6 @@ bool MachineCSE::PerformTrivialCoalescing(MachineInstr *MI,
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// deleted.
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continue;
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MachineInstr *DefMI = MRI->getVRegDef(Reg);
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if (DefMI->getParent() != MBB)
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continue;
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if (!DefMI->isCopy())
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continue;
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unsigned SrcReg = DefMI->getOperand(1).getReg();
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@ -45,3 +45,35 @@ for.cond1.preheader: ; preds = %entry
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}
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
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; rdar://12462006
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define i8* @f3(i8* %base, i32* nocapture %offset, i32 %size) nounwind {
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entry:
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; CHECK: f3:
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; CHECK-NOT: sub
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; CHECK: cmp
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; CHECK: blt
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%0 = load i32* %offset, align 4
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%cmp = icmp slt i32 %0, %size
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%s = sub nsw i32 %0, %size
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%size2 = sub nsw i32 %size, 0
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br i1 %cmp, label %return, label %if.end
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if.end:
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; We are checking cse between %sub here and %s in entry block.
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%sub = sub nsw i32 %0, %size2
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%s2 = sub nsw i32 %s, %size
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%s3 = sub nsw i32 %sub, %s2
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; CHECK: sub [[R1:r[0-9]+]], [[R2:r[0-9]+]], r2
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; CHECK: sub [[R3:r[0-9]+]], [[R1]], r2
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; CHECK: sub [[R4:r[0-9]+]], [[R1]], [[R3]]
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; CHECK-NOT: sub
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; CHECK: str
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store i32 %s3, i32* %offset, align 4
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%add.ptr = getelementptr inbounds i8* %base, i32 %sub
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br label %return
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return:
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%retval.0 = phi i8* [ %add.ptr, %if.end ], [ null, %entry ]
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ret i8* %retval.0
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}
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