From 3ada3e3f823179f6d077abbb6e7e885222175e7d Mon Sep 17 00:00:00 2001 From: Misha Brukman Date: Mon, 26 Jul 2004 21:50:38 +0000 Subject: [PATCH] ADDI can take several forms, including: addi r1, r2, 0 addi r1, , 0 so we must check for the second parameter being a register for this instruction to be considered a reg-to-reg copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15244 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PowerPCInstrInfo.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/Target/PowerPC/PowerPCInstrInfo.cpp b/lib/Target/PowerPC/PowerPCInstrInfo.cpp index e7354cdc442..ba14b36baf1 100644 --- a/lib/Target/PowerPC/PowerPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PowerPCInstrInfo.cpp @@ -40,10 +40,9 @@ bool PowerPCInstrInfo::isMoveInstr(const MachineInstr& MI, } else if (oc == PPC32::ADDI) { // addi r1, r2, 0 assert(MI.getNumOperands() == 3 && MI.getOperand(0).isRegister() && - MI.getOperand(1).isRegister() && MI.getOperand(2).isImmediate() && "invalid PPC32 ADDI instruction!"); - if (MI.getOperand(2).getImmedValue() == 0) { + if (MI.getOperand(1).isRegister() && MI.getOperand(2).getImmedValue()==0) { sourceReg = MI.getOperand(1).getReg(); destReg = MI.getOperand(0).getReg(); return true;