mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-08-09 11:25:55 +00:00
[C++11] Remove 'virtual' keyword from methods marked with 'override' keyword.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203444 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -143,7 +143,7 @@ protected:
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const Twine &Name, Instruction *InsertBefore);
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const Twine &Name, Instruction *InsertBefore);
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BinaryOperator(BinaryOps iType, Value *S1, Value *S2, Type *Ty,
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BinaryOperator(BinaryOps iType, Value *S1, Value *S2, Type *Ty,
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const Twine &Name, BasicBlock *InsertAtEnd);
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const Twine &Name, BasicBlock *InsertAtEnd);
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virtual BinaryOperator *clone_impl() const override;
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BinaryOperator *clone_impl() const override;
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public:
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public:
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// allocate space for exactly two operands
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// allocate space for exactly two operands
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void *operator new(size_t s) {
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void *operator new(size_t s) {
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@@ -385,7 +385,7 @@ DEFINE_TRANSPARENT_OPERAND_ACCESSORS(BinaryOperator, Value)
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/// if (isa<CastInst>(Instr)) { ... }
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/// if (isa<CastInst>(Instr)) { ... }
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/// @brief Base class of casting instructions.
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/// @brief Base class of casting instructions.
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class CastInst : public UnaryInstruction {
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class CastInst : public UnaryInstruction {
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virtual void anchor() override;
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void anchor() override;
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protected:
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protected:
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/// @brief Constructor with insert-before-instruction semantics for subclasses
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/// @brief Constructor with insert-before-instruction semantics for subclasses
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CastInst(Type *Ty, unsigned iType, Value *S,
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CastInst(Type *Ty, unsigned iType, Value *S,
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@@ -647,7 +647,7 @@ protected:
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Value *LHS, Value *RHS, const Twine &Name,
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Value *LHS, Value *RHS, const Twine &Name,
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BasicBlock *InsertAtEnd);
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BasicBlock *InsertAtEnd);
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virtual void anchor() override; // Out of line virtual method.
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void anchor() override; // Out of line virtual method.
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public:
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public:
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/// This enumeration lists the possible predicates for CmpInst subclasses.
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/// This enumeration lists the possible predicates for CmpInst subclasses.
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/// Values in the range 0-31 are reserved for FCmpInst, while values in the
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/// Values in the range 0-31 are reserved for FCmpInst, while values in the
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@@ -221,7 +221,7 @@ public:
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}
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}
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SmallVectorImpl<char> &getContents() override { return Contents; }
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SmallVectorImpl<char> &getContents() override { return Contents; }
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virtual const SmallVectorImpl<char> &getContents() const override {
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const SmallVectorImpl<char> &getContents() const override {
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return Contents;
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return Contents;
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}
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}
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@@ -43,11 +43,11 @@ public:
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initializeBasicTTIPass(*PassRegistry::getPassRegistry());
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initializeBasicTTIPass(*PassRegistry::getPassRegistry());
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}
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}
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virtual void initializePass() override {
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void initializePass() override {
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pushTTIStack(this);
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pushTTIStack(this);
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}
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const override {
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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TargetTransformInfo::getAnalysisUsage(AU);
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TargetTransformInfo::getAnalysisUsage(AU);
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}
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}
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@@ -55,64 +55,61 @@ public:
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static char ID;
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static char ID;
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/// Provide necessary pointer adjustments for the two base classes.
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/// Provide necessary pointer adjustments for the two base classes.
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virtual void *getAdjustedAnalysisPointer(const void *ID) override {
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void *getAdjustedAnalysisPointer(const void *ID) override {
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if (ID == &TargetTransformInfo::ID)
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if (ID == &TargetTransformInfo::ID)
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return (TargetTransformInfo*)this;
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return (TargetTransformInfo*)this;
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return this;
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return this;
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}
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}
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virtual bool hasBranchDivergence() const override;
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bool hasBranchDivergence() const override;
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/// \name Scalar TTI Implementations
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/// \name Scalar TTI Implementations
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/// @{
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/// @{
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virtual bool isLegalAddImmediate(int64_t imm) const override;
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bool isLegalAddImmediate(int64_t imm) const override;
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virtual bool isLegalICmpImmediate(int64_t imm) const override;
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bool isLegalICmpImmediate(int64_t imm) const override;
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virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
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bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
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int64_t BaseOffset, bool HasBaseReg,
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int64_t BaseOffset, bool HasBaseReg,
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int64_t Scale) const override;
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int64_t Scale) const override;
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virtual int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
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int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
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int64_t BaseOffset, bool HasBaseReg,
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int64_t BaseOffset, bool HasBaseReg,
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int64_t Scale) const override;
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int64_t Scale) const override;
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virtual bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
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bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
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virtual bool isTypeLegal(Type *Ty) const override;
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bool isTypeLegal(Type *Ty) const override;
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virtual unsigned getJumpBufAlignment() const override;
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unsigned getJumpBufAlignment() const override;
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virtual unsigned getJumpBufSize() const override;
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unsigned getJumpBufSize() const override;
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virtual bool shouldBuildLookupTables() const override;
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bool shouldBuildLookupTables() const override;
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virtual bool haveFastSqrt(Type *Ty) const override;
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bool haveFastSqrt(Type *Ty) const override;
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virtual void getUnrollingPreferences(
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void getUnrollingPreferences(Loop *L,
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Loop *L, UnrollingPreferences &UP) const override;
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UnrollingPreferences &UP) const override;
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/// @}
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/// @}
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/// \name Vector TTI Implementations
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/// \name Vector TTI Implementations
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/// @{
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/// @{
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virtual unsigned getNumberOfRegisters(bool Vector) const override;
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unsigned getNumberOfRegisters(bool Vector) const override;
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virtual unsigned getMaximumUnrollFactor() const override;
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unsigned getMaximumUnrollFactor() const override;
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virtual unsigned getRegisterBitWidth(bool Vector) const override;
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unsigned getRegisterBitWidth(bool Vector) const override;
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virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty,
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unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind,
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OperandValueKind,
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OperandValueKind) const override;
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OperandValueKind) const override;
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unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
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virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
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int Index, Type *SubTp) const override;
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int Index, Type *SubTp) const override;
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unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
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virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
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Type *Src) const override;
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Type *Src) const override;
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unsigned getCFInstrCost(unsigned Opcode) const override;
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virtual unsigned getCFInstrCost(unsigned Opcode) const override;
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unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
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virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
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Type *CondTy) const override;
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Type *CondTy) const override;
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unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
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virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
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unsigned Index) const override;
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unsigned Index) const override;
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unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
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virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
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unsigned AddressSpace) const override;
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unsigned Alignment,
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unsigned getIntrinsicInstrCost(Intrinsic::ID, Type *RetTy,
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unsigned AddressSpace) const override;
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ArrayRef<Type*> Tys) const override;
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virtual unsigned getIntrinsicInstrCost(
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unsigned getNumberOfParts(Type *Tp) const override;
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Intrinsic::ID, Type *RetTy, ArrayRef<Type*> Tys) const override;
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unsigned getAddressComputationCost( Type *Ty, bool IsComplex) const override;
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virtual unsigned getNumberOfParts(Type *Tp) const override;
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unsigned getReductionCost(unsigned Opcode, Type *Ty,
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virtual unsigned getAddressComputationCost(
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bool IsPairwise) const override;
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Type *Ty, bool IsComplex) const override;
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virtual unsigned getReductionCost(unsigned Opcode, Type *Ty,
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bool IsPairwise) const override;
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/// @}
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/// @}
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};
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};
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@@ -2444,29 +2444,29 @@ public:
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GenericSchedulerBase(C), DAG(0), Top(SchedBoundary::TopQID, "TopQ"),
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GenericSchedulerBase(C), DAG(0), Top(SchedBoundary::TopQID, "TopQ"),
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Bot(SchedBoundary::BotQID, "BotQ") {}
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Bot(SchedBoundary::BotQID, "BotQ") {}
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virtual void initPolicy(MachineBasicBlock::iterator Begin,
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void initPolicy(MachineBasicBlock::iterator Begin,
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MachineBasicBlock::iterator End,
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MachineBasicBlock::iterator End,
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unsigned NumRegionInstrs) override;
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unsigned NumRegionInstrs) override;
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virtual bool shouldTrackPressure() const override {
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bool shouldTrackPressure() const override {
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return RegionPolicy.ShouldTrackPressure;
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return RegionPolicy.ShouldTrackPressure;
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}
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}
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virtual void initialize(ScheduleDAGMI *dag) override;
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void initialize(ScheduleDAGMI *dag) override;
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virtual SUnit *pickNode(bool &IsTopNode) override;
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SUnit *pickNode(bool &IsTopNode) override;
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virtual void schedNode(SUnit *SU, bool IsTopNode) override;
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void schedNode(SUnit *SU, bool IsTopNode) override;
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virtual void releaseTopNode(SUnit *SU) override {
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void releaseTopNode(SUnit *SU) override {
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Top.releaseTopNode(SU);
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Top.releaseTopNode(SU);
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}
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}
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virtual void releaseBottomNode(SUnit *SU) override {
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void releaseBottomNode(SUnit *SU) override {
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Bot.releaseBottomNode(SU);
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Bot.releaseBottomNode(SU);
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}
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}
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virtual void registerRoots() override;
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void registerRoots() override;
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protected:
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protected:
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void checkAcyclicLatency();
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void checkAcyclicLatency();
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@@ -3037,16 +3037,16 @@ public:
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virtual ~PostGenericScheduler() {}
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virtual ~PostGenericScheduler() {}
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virtual void initPolicy(MachineBasicBlock::iterator Begin,
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void initPolicy(MachineBasicBlock::iterator Begin,
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MachineBasicBlock::iterator End,
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MachineBasicBlock::iterator End,
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unsigned NumRegionInstrs) override {
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unsigned NumRegionInstrs) override {
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/* no configurable policy */
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/* no configurable policy */
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};
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};
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/// PostRA scheduling does not track pressure.
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/// PostRA scheduling does not track pressure.
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virtual bool shouldTrackPressure() const override { return false; }
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bool shouldTrackPressure() const override { return false; }
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virtual void initialize(ScheduleDAGMI *Dag) override {
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void initialize(ScheduleDAGMI *Dag) override {
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DAG = Dag;
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DAG = Dag;
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SchedModel = DAG->getSchedModel();
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SchedModel = DAG->getSchedModel();
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TRI = DAG->TRI;
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TRI = DAG->TRI;
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@@ -3065,22 +3065,22 @@ public:
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}
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}
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}
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}
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virtual void registerRoots() override;
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void registerRoots() override;
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virtual SUnit *pickNode(bool &IsTopNode) override;
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SUnit *pickNode(bool &IsTopNode) override;
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virtual void scheduleTree(unsigned SubtreeID) override {
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void scheduleTree(unsigned SubtreeID) override {
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llvm_unreachable("PostRA scheduler does not support subtree analysis.");
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llvm_unreachable("PostRA scheduler does not support subtree analysis.");
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}
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}
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virtual void schedNode(SUnit *SU, bool IsTopNode) override;
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void schedNode(SUnit *SU, bool IsTopNode) override;
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virtual void releaseTopNode(SUnit *SU) override {
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void releaseTopNode(SUnit *SU) override {
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Top.releaseTopNode(SU);
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Top.releaseTopNode(SU);
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}
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}
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// Only called for roots.
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// Only called for roots.
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virtual void releaseBottomNode(SUnit *SU) override {
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void releaseBottomNode(SUnit *SU) override {
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BotRoots.push_back(SU);
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BotRoots.push_back(SU);
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}
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}
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@@ -49,36 +49,36 @@ public:
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Subtarget = &TM.getSubtarget<ARMSubtarget>();
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Subtarget = &TM.getSubtarget<ARMSubtarget>();
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}
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}
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virtual const char *getPassName() const override {
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const char *getPassName() const override {
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return "ARM Assembly / Object Emitter";
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return "ARM Assembly / Object Emitter";
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}
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}
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void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
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void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
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const char *Modifier = 0);
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const char *Modifier = 0);
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|
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virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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unsigned AsmVariant, const char *ExtraCode,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &O) override;
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raw_ostream &O) override;
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virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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unsigned AsmVariant, const char *ExtraCode,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &O) override;
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raw_ostream &O) override;
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|
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virtual void emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
|
void emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
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const MCSubtargetInfo *EndInfo) const override;
|
const MCSubtargetInfo *EndInfo) const override;
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|
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void EmitJumpTable(const MachineInstr *MI);
|
void EmitJumpTable(const MachineInstr *MI);
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void EmitJump2Table(const MachineInstr *MI);
|
void EmitJump2Table(const MachineInstr *MI);
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virtual void EmitInstruction(const MachineInstr *MI) override;
|
void EmitInstruction(const MachineInstr *MI) override;
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virtual bool runOnMachineFunction(MachineFunction &F) override;
|
bool runOnMachineFunction(MachineFunction &F) override;
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|
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virtual void EmitConstantPool() override {
|
void EmitConstantPool() override {
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// we emit constant pools customly!
|
// we emit constant pools customly!
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}
|
}
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virtual void EmitFunctionBodyEnd() override;
|
void EmitFunctionBodyEnd() override;
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virtual void EmitFunctionEntryLabel() override;
|
void EmitFunctionEntryLabel() override;
|
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virtual void EmitStartOfAsmFile(Module &M) override;
|
void EmitStartOfAsmFile(Module &M) override;
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virtual void EmitEndOfAsmFile(Module &M) override;
|
void EmitEndOfAsmFile(Module &M) override;
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virtual void EmitXXStructor(const Constant *CV) override;
|
void EmitXXStructor(const Constant *CV) override;
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|
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// lowerOperand - Convert a MachineOperand into the equivalent MCOperand.
|
// lowerOperand - Convert a MachineOperand into the equivalent MCOperand.
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bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp);
|
bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp);
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@@ -97,7 +97,7 @@ private:
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const MachineInstr *MI);
|
const MachineInstr *MI);
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|
|
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public:
|
public:
|
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virtual unsigned getISAEncoding() override {
|
unsigned getISAEncoding() override {
|
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// ARM/Darwin adds ISA to the DWARF info for each function.
|
// ARM/Darwin adds ISA to the DWARF info for each function.
|
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if (!Subtarget->isTargetMachO())
|
if (!Subtarget->isTargetMachO())
|
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return 0;
|
return 0;
|
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@@ -116,8 +116,7 @@ private:
|
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public:
|
public:
|
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/// EmitMachineConstantPoolValue - Print a machine constantpool value to
|
/// EmitMachineConstantPoolValue - Print a machine constantpool value to
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/// the .s file.
|
/// the .s file.
|
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virtual void
|
void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override;
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EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override;
|
|
||||||
};
|
};
|
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} // end namespace llvm
|
} // end namespace llvm
|
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|
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|
@@ -29,9 +29,8 @@ namespace {
|
|||||||
X86WinCOFFObjectWriter(bool Is64Bit_);
|
X86WinCOFFObjectWriter(bool Is64Bit_);
|
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virtual ~X86WinCOFFObjectWriter();
|
virtual ~X86WinCOFFObjectWriter();
|
||||||
|
|
||||||
virtual unsigned getRelocType(const MCValue &Target,
|
unsigned getRelocType(const MCValue &Target, const MCFixup &Fixup,
|
||||||
const MCFixup &Fixup,
|
bool IsCrossSection) const override;
|
||||||
bool IsCrossSection) const override;
|
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
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|
@@ -33,26 +33,26 @@ class LLVM_LIBRARY_VISIBILITY X86AsmPrinter : public AsmPrinter {
|
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Subtarget = &TM.getSubtarget<X86Subtarget>();
|
Subtarget = &TM.getSubtarget<X86Subtarget>();
|
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}
|
}
|
||||||
|
|
||||||
virtual const char *getPassName() const override {
|
const char *getPassName() const override {
|
||||||
return "X86 Assembly / Object Emitter";
|
return "X86 Assembly / Object Emitter";
|
||||||
}
|
}
|
||||||
|
|
||||||
const X86Subtarget &getSubtarget() const { return *Subtarget; }
|
const X86Subtarget &getSubtarget() const { return *Subtarget; }
|
||||||
|
|
||||||
virtual void EmitStartOfAsmFile(Module &M) override;
|
void EmitStartOfAsmFile(Module &M) override;
|
||||||
|
|
||||||
virtual void EmitEndOfAsmFile(Module &M) override;
|
void EmitEndOfAsmFile(Module &M) override;
|
||||||
|
|
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virtual void EmitInstruction(const MachineInstr *MI) override;
|
void EmitInstruction(const MachineInstr *MI) override;
|
||||||
|
|
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virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
|
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
|
||||||
unsigned AsmVariant, const char *ExtraCode,
|
unsigned AsmVariant, const char *ExtraCode,
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||||||
raw_ostream &OS) override;
|
raw_ostream &OS) override;
|
||||||
virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
|
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
|
||||||
unsigned AsmVariant, const char *ExtraCode,
|
unsigned AsmVariant, const char *ExtraCode,
|
||||||
raw_ostream &OS) override;
|
raw_ostream &OS) override;
|
||||||
|
|
||||||
virtual bool runOnMachineFunction(MachineFunction &F) override;
|
bool runOnMachineFunction(MachineFunction &F) override;
|
||||||
};
|
};
|
||||||
|
|
||||||
} // end namespace llvm
|
} // end namespace llvm
|
||||||
|
@@ -52,11 +52,11 @@ public:
|
|||||||
initializeX86TTIPass(*PassRegistry::getPassRegistry());
|
initializeX86TTIPass(*PassRegistry::getPassRegistry());
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void initializePass() override {
|
void initializePass() override {
|
||||||
pushTTIStack(this);
|
pushTTIStack(this);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void getAnalysisUsage(AnalysisUsage &AU) const override {
|
void getAnalysisUsage(AnalysisUsage &AU) const override {
|
||||||
TargetTransformInfo::getAnalysisUsage(AU);
|
TargetTransformInfo::getAnalysisUsage(AU);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -64,7 +64,7 @@ public:
|
|||||||
static char ID;
|
static char ID;
|
||||||
|
|
||||||
/// Provide necessary pointer adjustments for the two base classes.
|
/// Provide necessary pointer adjustments for the two base classes.
|
||||||
virtual void *getAdjustedAnalysisPointer(const void *ID) override {
|
void *getAdjustedAnalysisPointer(const void *ID) override {
|
||||||
if (ID == &TargetTransformInfo::ID)
|
if (ID == &TargetTransformInfo::ID)
|
||||||
return (TargetTransformInfo*)this;
|
return (TargetTransformInfo*)this;
|
||||||
return this;
|
return this;
|
||||||
@@ -72,43 +72,41 @@ public:
|
|||||||
|
|
||||||
/// \name Scalar TTI Implementations
|
/// \name Scalar TTI Implementations
|
||||||
/// @{
|
/// @{
|
||||||
virtual PopcntSupportKind getPopcntSupport(unsigned TyWidth) const override;
|
PopcntSupportKind getPopcntSupport(unsigned TyWidth) const override;
|
||||||
|
|
||||||
/// @}
|
/// @}
|
||||||
|
|
||||||
/// \name Vector TTI Implementations
|
/// \name Vector TTI Implementations
|
||||||
/// @{
|
/// @{
|
||||||
|
|
||||||
virtual unsigned getNumberOfRegisters(bool Vector) const override;
|
unsigned getNumberOfRegisters(bool Vector) const override;
|
||||||
virtual unsigned getRegisterBitWidth(bool Vector) const override;
|
unsigned getRegisterBitWidth(bool Vector) const override;
|
||||||
virtual unsigned getMaximumUnrollFactor() const override;
|
unsigned getMaximumUnrollFactor() const override;
|
||||||
virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty,
|
unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind,
|
||||||
OperandValueKind,
|
OperandValueKind) const override;
|
||||||
OperandValueKind) const override;
|
unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
|
||||||
virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
|
int Index, Type *SubTp) const override;
|
||||||
int Index, Type *SubTp) const override;
|
unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
|
||||||
virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
|
Type *Src) const override;
|
||||||
Type *Src) const override;
|
unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
|
||||||
virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
|
Type *CondTy) const override;
|
||||||
Type *CondTy) const override;
|
unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
|
||||||
virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
|
unsigned Index) const override;
|
||||||
unsigned Index) const override;
|
unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
|
||||||
virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
|
unsigned AddressSpace) const override;
|
||||||
unsigned Alignment,
|
|
||||||
unsigned AddressSpace) const override;
|
|
||||||
|
|
||||||
virtual unsigned
|
unsigned getAddressComputationCost(Type *PtrTy,
|
||||||
getAddressComputationCost(Type *PtrTy, bool IsComplex) const override;
|
bool IsComplex) const override;
|
||||||
|
|
||||||
virtual unsigned getReductionCost(unsigned Opcode, Type *Ty,
|
unsigned getReductionCost(unsigned Opcode, Type *Ty,
|
||||||
bool IsPairwiseForm) const override;
|
bool IsPairwiseForm) const override;
|
||||||
|
|
||||||
virtual unsigned getIntImmCost(const APInt &Imm, Type *Ty) const override;
|
unsigned getIntImmCost(const APInt &Imm, Type *Ty) const override;
|
||||||
|
|
||||||
virtual unsigned getIntImmCost(unsigned Opcode, const APInt &Imm,
|
unsigned getIntImmCost(unsigned Opcode, const APInt &Imm,
|
||||||
Type *Ty) const override;
|
Type *Ty) const override;
|
||||||
virtual unsigned getIntImmCost(Intrinsic::ID IID, const APInt &Imm,
|
unsigned getIntImmCost(Intrinsic::ID IID, const APInt &Imm,
|
||||||
Type *Ty) const override;
|
Type *Ty) const override;
|
||||||
|
|
||||||
/// @}
|
/// @}
|
||||||
};
|
};
|
||||||
|
Reference in New Issue
Block a user