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Introduce a pass to insert vzeroupper instructions to avoid AVX to
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper" llc command line option. This is only the first step (very naive and conservative one) to sketch out the idea, but proper DFA is coming next to allow smarter decisions. Comments and ideas now and in further commits will be very appreciated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138317 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -32,6 +32,7 @@ set(sources
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X86Subtarget.cpp
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X86TargetMachine.cpp
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X86TargetObjectFile.cpp
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X86VZeroUpper.cpp
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)
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if( CMAKE_CL_64 )
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@ -48,6 +48,11 @@ FunctionPass *createX86FloatingPointStackifierPass();
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/// crossings.
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FunctionPass *createSSEDomainFixPass();
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/// createX86IssueVZeroUpperPass - This pass inserts AVX vzeroupper instructions
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/// before each call to avoid transition penalty between functions encoded with
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/// AVX and SSE.
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FunctionPass *createX86IssueVZeroUpperPass();
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/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
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/// to the specified MCE object.
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FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
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@ -16,6 +16,7 @@
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetRegistry.h"
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@ -91,6 +92,16 @@ X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT,
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FloatABIType = FloatABI::Hard;
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}
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//===----------------------------------------------------------------------===//
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// Command line options for x86
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//===----------------------------------------------------------------------===//
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bool UseVZeroUpper;
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static cl::opt<bool, true>
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VZeroUpper("x86-use-vzeroupper",
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cl::desc("Minimize AVX to SSE transition penalty"),
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cl::location(UseVZeroUpper), cl::init(false));
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//===----------------------------------------------------------------------===//
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// Pass Pipeline Configuration
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//===----------------------------------------------------------------------===//
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@ -125,6 +136,11 @@ bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
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PM.add(createSSEDomainFixPass());
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return true;
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}
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if (Subtarget.hasAVX() && UseVZeroUpper) {
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PM.add(createX86IssueVZeroUpperPass());
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return true;
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}
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return false;
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}
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105
lib/Target/X86/X86VZeroUpper.cpp
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105
lib/Target/X86/X86VZeroUpper.cpp
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@ -0,0 +1,105 @@
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//===-- X86VZeroUpper.cpp - AVX vzeroupper instruction inserter -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the pass which inserts x86 AVX vzeroupper instructions
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// before calls to SSE encoded functions. This avoids transition latency
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// penalty when tranfering control between AVX encoded instructions and old
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// SSE encoding mode.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "x86-codegen"
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#include "X86.h"
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#include "X86InstrInfo.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/GlobalValue.h"
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#include "llvm/Target/TargetInstrInfo.h"
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using namespace llvm;
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STATISTIC(NumVZU, "Number of vzeroupper instructions inserted");
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namespace {
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struct VZeroUpperInserter : public MachineFunctionPass {
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static char ID;
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VZeroUpperInserter() : MachineFunctionPass(ID) {}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB);
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virtual const char *getPassName() const { return "X86 vzeroupper inserter";}
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private:
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const TargetInstrInfo *TII; // Machine instruction info.
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MachineBasicBlock *MBB; // Current basic block
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};
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char VZeroUpperInserter::ID = 0;
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}
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FunctionPass *llvm::createX86IssueVZeroUpperPass() {
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return new VZeroUpperInserter();
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}
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/// runOnMachineFunction - Loop over all of the basic blocks, inserting
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/// vzero upper instructions before function calls.
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bool VZeroUpperInserter::runOnMachineFunction(MachineFunction &MF) {
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TII = MF.getTarget().getInstrInfo();
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bool Changed = false;
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// Process any unreachable blocks in arbitrary order now.
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for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
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Changed |= processBasicBlock(MF, *BB);
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return Changed;
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}
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bool isCallToModuleFn(const MachineInstr *MI) {
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assert(MI->getDesc().isCall() && "Isn't a call instruction");
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for (int i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isGlobal())
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continue;
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const GlobalValue *GV = MO.getGlobal();
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GlobalValue::LinkageTypes LT = GV->getLinkage();
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if (GV->isInternalLinkage(LT) || GV->isPrivateLinkage(LT) ||
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(GV->isExternalLinkage(LT) && !GV->isDeclaration()))
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return true;
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return false;
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}
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return false;
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}
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/// processBasicBlock - Loop over all of the instructions in the basic block,
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/// inserting vzero upper instructions before function calls.
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bool VZeroUpperInserter::processBasicBlock(MachineFunction &MF,
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MachineBasicBlock &BB) {
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bool Changed = false;
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MBB = &BB;
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for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) {
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MachineInstr *MI = I;
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DebugLoc dl = I->getDebugLoc();
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// Insert a vzeroupper instruction before each control transfer
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// to functions outside this module
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if (MI->getDesc().isCall() && !isCallToModuleFn(MI)) {
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BuildMI(*MBB, I, dl, TII->get(X86::VZEROUPPER));
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++NumVZU;
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}
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}
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return Changed;
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}
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26
test/CodeGen/X86/avx-vzeroupper.ll
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26
test/CodeGen/X86/avx-vzeroupper.ll
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@ -0,0 +1,26 @@
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; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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define <4 x float> @do_sse_local(<4 x float> %a) nounwind uwtable readnone ssp {
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entry:
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%add.i = fadd <4 x float> %a, %a
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ret <4 x float> %add.i
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}
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; CHECK: _test00
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define <4 x float> @test00(<4 x float> %a, <4 x float> %b) nounwind uwtable ssp {
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entry:
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%add.i = fadd <4 x float> %a, %b
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; CHECK: vzeroupper
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; CHECK-NEXT: callq _do_sse
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%call3 = tail call <4 x float> @do_sse(<4 x float> %add.i) nounwind
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%sub.i = fsub <4 x float> %call3, %add.i
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; CHECK-NOT: vzeroupper
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; CHECK: callq _do_sse_local
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%call8 = tail call <4 x float> @do_sse_local(<4 x float> %sub.i)
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; CHECK: vzeroupper
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; CHECK-NEXT: jmp _do_sse
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%call10 = tail call <4 x float> @do_sse(<4 x float> %call8) nounwind
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ret <4 x float> %call10
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}
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declare <4 x float> @do_sse(<4 x float>)
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