mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-16 14:31:59 +00:00
Change the way free regusters are computed and perform better
allocation in the presence of preallocated intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10595 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
1715ce00e4
commit
3bf564a95f
@ -55,6 +55,7 @@ namespace {
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RegMask reserved_;
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RegMask reserved_;
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unsigned regUse_[MRegisterInfo::FirstVirtualRegister];
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unsigned regUse_[MRegisterInfo::FirstVirtualRegister];
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unsigned regUseBackup_[MRegisterInfo::FirstVirtualRegister];
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typedef LiveIntervals::MachineBasicBlockPtrs MachineBasicBlockPtrs;
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typedef LiveIntervals::MachineBasicBlockPtrs MachineBasicBlockPtrs;
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MachineBasicBlockPtrs mbbs_;
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MachineBasicBlockPtrs mbbs_;
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@ -105,14 +106,6 @@ namespace {
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/// register handling helpers
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/// register handling helpers
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///
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///
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/// reservePhysReg - reserves a physical register and spills
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/// any value assigned to it if any
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void reservePhysReg(unsigned reg);
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/// clearReservedPhysReg - marks pysical register as free for
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/// use
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void clearReservedPhysReg(unsigned reg);
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/// getFreePhysReg - return a free physical register for this
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/// getFreePhysReg - return a free physical register for this
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/// virtual register interval if we have one, otherwise return
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/// virtual register interval if we have one, otherwise return
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/// 0
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/// 0
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@ -159,6 +152,14 @@ namespace {
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void markPhysRegFree(unsigned physReg);
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void markPhysRegFree(unsigned physReg);
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void markPhysRegNotFree(unsigned physReg);
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void markPhysRegNotFree(unsigned physReg);
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void backupRegUse() {
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memcpy(regUseBackup_, regUse_, sizeof(regUseBackup_));
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}
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void restoreRegUse() {
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memcpy(regUse_, regUseBackup_, sizeof(regUseBackup_));
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}
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void printVirt2PhysMap() const {
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void printVirt2PhysMap() const {
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std::cerr << "allocated registers:\n";
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std::cerr << "allocated registers:\n";
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for (Virt2PhysMap::const_iterator
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for (Virt2PhysMap::const_iterator
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@ -212,6 +213,7 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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v2pMap_.clear();
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v2pMap_.clear();
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v2ssMap_.clear();
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v2ssMap_.clear();
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memset(regUse_, 0, sizeof(regUse_));
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memset(regUse_, 0, sizeof(regUse_));
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memset(regUseBackup_, 0, sizeof(regUseBackup_));
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DEBUG(
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DEBUG(
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unsigned i = 0;
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unsigned i = 0;
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@ -257,19 +259,37 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
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DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
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DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end()));
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DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end()));
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for (MRegisterInfo::regclass_iterator c = mri_->regclass_begin();
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c != mri_->regclass_end(); ++c) {
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const TargetRegisterClass* rc = *c;
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DEBUG(printFreeRegs("\tfree registers", rc));
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}
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processActiveIntervals(i);
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processActiveIntervals(i);
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processInactiveIntervals(i);
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processInactiveIntervals(i);
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backupRegUse();
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// for every interval in inactive we overlap mark the register
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// as not free
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for (IntervalPtrs::iterator j = inactive_.begin();
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j != inactive_.end(); ++j) {
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unsigned reg = (*j)->reg;
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if (reg >= MRegisterInfo::FirstVirtualRegister)
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reg = v2pMap_[reg];
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if (i->overlaps(**j)) {
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markPhysRegNotFree(reg);
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}
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}
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// for every pre-allocated interval in unhandled we overlap
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// mark the register as not free
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for (Intervals::const_iterator j = i + 1; j != e; ++j) {
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if (j->reg < MRegisterInfo::FirstVirtualRegister &&
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i->overlaps(*j))
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markPhysRegNotFree(j->reg);
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}
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DEBUG(std::cerr << "\tallocating current interval:\n");
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DEBUG(std::cerr << "\tallocating current interval:\n");
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// if this register is preallocated reserve it
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// if this register is preallocated reserve it
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if (i->reg < MRegisterInfo::FirstVirtualRegister) {
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if (i->reg < MRegisterInfo::FirstVirtualRegister) {
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reservePhysReg(i->reg);
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restoreRegUse();
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markPhysRegNotFree(i->reg);
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active_.push_back(&*i);
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active_.push_back(&*i);
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}
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}
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// otherwise we are allocating a virtual register. try to find
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// otherwise we are allocating a virtual register. try to find
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@ -281,6 +301,7 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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assignStackSlotAtInterval(i);
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assignStackSlotAtInterval(i);
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}
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}
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else {
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else {
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restoreRegUse();
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assignVirt2PhysReg(i->reg, physReg);
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assignVirt2PhysReg(i->reg, physReg);
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active_.push_back(&*i);
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active_.push_back(&*i);
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}
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}
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@ -290,24 +311,10 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
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for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
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unsigned reg = (*i)->reg;
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unsigned reg = (*i)->reg;
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DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
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DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
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if (reg < MRegisterInfo::FirstVirtualRegister) {
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if (reg >= MRegisterInfo::FirstVirtualRegister) {
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markPhysRegFree(reg);
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reg = v2pMap_[reg];
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}
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else {
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markPhysRegFree(v2pMap_[reg]);
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}
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}
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// expire any remaining inactive intervals
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for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();
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++i) {
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unsigned reg = (*i)->reg;
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DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
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if (reg < MRegisterInfo::FirstVirtualRegister) {
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markPhysRegFree(reg);
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}
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else {
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markPhysRegFree(v2pMap_[reg]);
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}
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}
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markPhysRegFree(reg);
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}
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}
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DEBUG(std::cerr << "finished register allocation\n");
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DEBUG(std::cerr << "finished register allocation\n");
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@ -413,18 +420,20 @@ void RA::processActiveIntervals(Intervals::const_iterator cur)
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// instruction
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// instruction
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if ((*i)->expiredAt(cur->start() + 1)) {
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if ((*i)->expiredAt(cur->start() + 1)) {
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DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
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DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
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if (reg < MRegisterInfo::FirstVirtualRegister) {
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if (reg >= MRegisterInfo::FirstVirtualRegister) {
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markPhysRegFree(reg);
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reg = v2pMap_[reg];
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}
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else {
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markPhysRegFree(v2pMap_[reg]);
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}
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}
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markPhysRegFree(reg);
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// remove from active
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// remove from active
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i = active_.erase(i);
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i = active_.erase(i);
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}
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}
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// move inactive intervals to inactive list
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// move inactive intervals to inactive list
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else if (!(*i)->liveAt(cur->start())) {
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else if (!(*i)->liveAt(cur->start())) {
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DEBUG(std::cerr << "\t\t\tinterval " << **i << " inactive\n");
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DEBUG(std::cerr << "\t\t\tinterval " << **i << " inactive\n");
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if (reg >= MRegisterInfo::FirstVirtualRegister) {
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reg = v2pMap_[reg];
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}
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markPhysRegFree(reg);
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// add to inactive
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// add to inactive
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inactive_.push_back(*i);
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inactive_.push_back(*i);
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// remove from active
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// remove from active
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@ -448,18 +457,16 @@ void RA::processInactiveIntervals(Intervals::const_iterator cur)
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// instruction
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// instruction
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if ((*i)->expiredAt(cur->start() + 1)) {
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if ((*i)->expiredAt(cur->start() + 1)) {
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DEBUG(std::cerr << "\t\t\tinterval " << **i << " expired\n");
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DEBUG(std::cerr << "\t\t\tinterval " << **i << " expired\n");
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if (reg < MRegisterInfo::FirstVirtualRegister) {
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markPhysRegFree(reg);
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}
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else {
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markPhysRegFree(v2pMap_[reg]);
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}
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// remove from inactive
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// remove from inactive
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i = inactive_.erase(i);
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i = inactive_.erase(i);
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}
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}
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// move re-activated intervals in active list
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// move re-activated intervals in active list
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else if ((*i)->liveAt(cur->start())) {
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else if ((*i)->liveAt(cur->start())) {
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DEBUG(std::cerr << "\t\t\tinterval " << **i << " active\n");
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DEBUG(std::cerr << "\t\t\tinterval " << **i << " active\n");
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if (reg >= MRegisterInfo::FirstVirtualRegister) {
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reg = v2pMap_[reg];
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}
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markPhysRegNotFree(reg);
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// add to active
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// add to active
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active_.push_back(*i);
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active_.push_back(*i);
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// remove from inactive
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// remove from inactive
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@ -487,18 +494,16 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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{
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{
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DEBUG(std::cerr << "\t\tassigning stack slot at interval "
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DEBUG(std::cerr << "\t\tassigning stack slot at interval "
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<< *cur << ":\n");
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<< *cur << ":\n");
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assert((!active_.empty() || !inactive_.empty()) &&
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"active and inactive sets cannot be both empty when choosing "
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"a register to spill");
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// set all weights to zero
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// set all weights to zero
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float regWeight[MRegisterInfo::FirstVirtualRegister];
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float regWeight[MRegisterInfo::FirstVirtualRegister];
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for (unsigned i = 0; i < MRegisterInfo::FirstVirtualRegister; ++i)
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for (unsigned i = 0; i < MRegisterInfo::FirstVirtualRegister; ++i)
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regWeight[i] = 0.0F;
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regWeight[i] = 0.0F;
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// for each interval in active that overlaps
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for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
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for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
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// if (!cur->overlaps(**i))
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if (!cur->overlaps(**i))
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// continue;
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continue;
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unsigned reg = (*i)->reg;
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unsigned reg = (*i)->reg;
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if (reg >= MRegisterInfo::FirstVirtualRegister) {
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if (reg >= MRegisterInfo::FirstVirtualRegister) {
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@ -509,10 +514,11 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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updateWeight(regWeight, *as, (*i)->weight);
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updateWeight(regWeight, *as, (*i)->weight);
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}
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}
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// for each interval in inactive that overlaps
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for (IntervalPtrs::iterator i = inactive_.begin();
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for (IntervalPtrs::iterator i = inactive_.begin();
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i != inactive_.end(); ++i) {
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i != inactive_.end(); ++i) {
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// if (!cur->overlaps(**i))
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if (!cur->overlaps(**i))
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// continue;
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continue;
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unsigned reg = (*i)->reg;
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unsigned reg = (*i)->reg;
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if (reg >= MRegisterInfo::FirstVirtualRegister) {
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if (reg >= MRegisterInfo::FirstVirtualRegister) {
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@ -523,6 +529,15 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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updateWeight(regWeight, *as, (*i)->weight);
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updateWeight(regWeight, *as, (*i)->weight);
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}
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}
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// for each fixed interval in unhandled that overlaps
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for (Intervals::const_iterator j = cur + 1; j != li_->end(); ++j) {
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if (j->reg >= MRegisterInfo::FirstVirtualRegister)
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continue;
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updateWeight(regWeight, j->reg, j->weight);
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for (const unsigned* as = mri_->getAliasSet(j->reg); *as; ++as)
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updateWeight(regWeight, *as, j->weight);
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}
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float minWeight = std::numeric_limits<float>::max();
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float minWeight = std::numeric_limits<float>::max();
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unsigned minReg = 0;
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unsigned minReg = 0;
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const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
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const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
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@ -536,6 +551,7 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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}
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}
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if (cur->weight < minWeight) {
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if (cur->weight < minWeight) {
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restoreRegUse();
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DEBUG(std::cerr << "\t\t\t\tspilling : " << mri_->getName(minReg)
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DEBUG(std::cerr << "\t\t\t\tspilling : " << mri_->getName(minReg)
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<< ", weight: " << cur->weight << '\n');
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<< ", weight: " << cur->weight << '\n');
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assignVirt2StackSlot(cur->reg);
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assignVirt2StackSlot(cur->reg);
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@ -546,11 +562,14 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
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for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
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toSpill.insert(*as);
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toSpill.insert(*as);
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std::vector<unsigned> spilled;
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for (IntervalPtrs::iterator i = active_.begin();
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for (IntervalPtrs::iterator i = active_.begin();
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i != active_.end(); ) {
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i != active_.end(); ) {
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unsigned reg = (*i)->reg;
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unsigned reg = (*i)->reg;
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if (reg >= MRegisterInfo::FirstVirtualRegister &&
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if (reg >= MRegisterInfo::FirstVirtualRegister &&
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toSpill.find(v2pMap_[reg]) != toSpill.end()) {
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toSpill.find(v2pMap_[reg]) != toSpill.end() &&
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cur->overlaps(**i)) {
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spilled.push_back(v2pMap_[reg]);
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DEBUG(std::cerr << "\t\t\t\tspilling : "
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DEBUG(std::cerr << "\t\t\t\tspilling : "
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<< mri_->getName(minReg) << ", weight: "
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<< mri_->getName(minReg) << ", weight: "
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<< (*i)->weight << '\n');
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<< (*i)->weight << '\n');
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@ -565,7 +584,8 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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i != inactive_.end(); ) {
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i != inactive_.end(); ) {
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unsigned reg = (*i)->reg;
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unsigned reg = (*i)->reg;
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if (reg >= MRegisterInfo::FirstVirtualRegister &&
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if (reg >= MRegisterInfo::FirstVirtualRegister &&
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toSpill.find(v2pMap_[reg]) != toSpill.end()) {
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toSpill.find(v2pMap_[reg]) != toSpill.end() &&
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cur->overlaps(**i)) {
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DEBUG(std::cerr << "\t\t\t\tspilling : "
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DEBUG(std::cerr << "\t\t\t\tspilling : "
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<< mri_->getName(minReg) << ", weight: "
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<< mri_->getName(minReg) << ", weight: "
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<< (*i)->weight << '\n');
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<< (*i)->weight << '\n');
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@ -579,69 +599,16 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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unsigned physReg = getFreePhysReg(cur);
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unsigned physReg = getFreePhysReg(cur);
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assert(physReg && "no free physical register after spill?");
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assert(physReg && "no free physical register after spill?");
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restoreRegUse();
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for (unsigned i = 0; i < spilled.size(); ++i)
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markPhysRegFree(spilled[i]);
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assignVirt2PhysReg(cur->reg, physReg);
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assignVirt2PhysReg(cur->reg, physReg);
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active_.push_back(&*cur);
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active_.push_back(&*cur);
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}
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}
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}
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}
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void RA::reservePhysReg(unsigned physReg)
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{
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DEBUG(std::cerr << "\t\t\treserving physical register: "
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<< mri_->getName(physReg) << '\n');
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Regs clobbered;
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clobbered.push_back(physReg);
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for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
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clobbered.push_back(*as);
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}
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// remove interval from active
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for (IntervalPtrs::iterator i = active_.begin(), e = active_.end();
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i != e; ) {
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unsigned reg = (*i)->reg;
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if (reg < MRegisterInfo::FirstVirtualRegister) {
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++i;
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continue;
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}
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if (find(clobbered.begin(), clobbered.end(), v2pMap_[reg]) !=
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clobbered.end()) {
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i = active_.erase(i);
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assignVirt2StackSlot(reg);
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}
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else {
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++i;
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}
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}
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// or from inactive
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for (IntervalPtrs::iterator i = inactive_.begin(), e = inactive_.end();
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i != e; ) {
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unsigned reg = (*i)->reg;
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if (reg < MRegisterInfo::FirstVirtualRegister) {
|
|
||||||
++i;
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (find(clobbered.begin(), clobbered.end(), v2pMap_[reg]) !=
|
|
||||||
clobbered.end()) {
|
|
||||||
i = inactive_.erase(i);
|
|
||||||
assignVirt2StackSlot(reg);
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
++i;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
markPhysRegNotFree(physReg);
|
|
||||||
}
|
|
||||||
|
|
||||||
void RA::clearReservedPhysReg(unsigned physReg)
|
|
||||||
{
|
|
||||||
DEBUG(std::cerr << "\t\t\tclearing reserved physical register: "
|
|
||||||
<< mri_->getName(physReg) << '\n');
|
|
||||||
markPhysRegFree(physReg);
|
|
||||||
}
|
|
||||||
|
|
||||||
bool RA::physRegAvailable(unsigned physReg)
|
bool RA::physRegAvailable(unsigned physReg)
|
||||||
{
|
{
|
||||||
assert(!reserved_[physReg] &&
|
assert(!reserved_[physReg] &&
|
||||||
@ -654,37 +621,17 @@ unsigned RA::getFreePhysReg(Intervals::const_iterator cur)
|
|||||||
{
|
{
|
||||||
DEBUG(std::cerr << "\t\tgetting free physical register: ");
|
DEBUG(std::cerr << "\t\tgetting free physical register: ");
|
||||||
|
|
||||||
// save the regUse counts because we are going to modify them
|
|
||||||
// specifically for this interval
|
|
||||||
unsigned regUseBackup[MRegisterInfo::FirstVirtualRegister];
|
|
||||||
memcpy(regUseBackup, regUse_, sizeof(regUseBackup));
|
|
||||||
|
|
||||||
// for every interval in inactive we don't overlap mark the
|
|
||||||
// register as free
|
|
||||||
for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();
|
|
||||||
++i) {
|
|
||||||
unsigned reg = (*i)->reg;
|
|
||||||
if (reg >= MRegisterInfo::FirstVirtualRegister)
|
|
||||||
reg = v2pMap_[reg];
|
|
||||||
|
|
||||||
if (!cur->overlaps(**i)) {
|
|
||||||
markPhysRegFree(reg);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
|
const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
|
||||||
for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
|
for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
|
||||||
i != rc->allocation_order_end(*mf_); ++i) {
|
i != rc->allocation_order_end(*mf_); ++i) {
|
||||||
unsigned reg = *i;
|
unsigned reg = *i;
|
||||||
if (!reserved_[reg] && !regUse_[reg]) {
|
if (!reserved_[reg] && !regUse_[reg]) {
|
||||||
DEBUG(std::cerr << mri_->getName(reg) << '\n');
|
DEBUG(std::cerr << mri_->getName(reg) << '\n');
|
||||||
memcpy(regUse_, regUseBackup, sizeof(regUseBackup));
|
|
||||||
return reg;
|
return reg;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
DEBUG(std::cerr << "no free register\n");
|
DEBUG(std::cerr << "no free register\n");
|
||||||
memcpy(regUse_, regUseBackup, sizeof(regUseBackup));
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Loading…
x
Reference in New Issue
Block a user