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https://github.com/c64scene-ar/llvm-6502.git
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Remove some README.txt entries which are now implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92511 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -530,7 +530,7 @@ We should inline lrintf and probably other libc functions.
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//===---------------------------------------------------------------------===//
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//===---------------------------------------------------------------------===//
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Start using the flags more. For example, compile:
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Use the FLAGS values from arithmetic instructions more. For example, compile:
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int add_zf(int *x, int y, int a, int b) {
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int add_zf(int *x, int y, int a, int b) {
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if ((*x += y) == 0)
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if ((*x += y) == 0)
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@@ -554,31 +554,8 @@ _add_zf:
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movl %ecx, %eax
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movl %ecx, %eax
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ret
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ret
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and:
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As another example, compile function f2 in test/CodeGen/X86/cmp-test.ll
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without a test instruction.
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int add_zf(int *x, int y, int a, int b) {
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if ((*x + y) < 0)
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return a;
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else
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return b;
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}
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to:
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add_zf:
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addl (%rdi), %esi
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movl %edx, %eax
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cmovns %ecx, %eax
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ret
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instead of:
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_add_zf:
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addl (%rdi), %esi
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testl %esi, %esi
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cmovs %edx, %ecx
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movl %ecx, %eax
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ret
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//===---------------------------------------------------------------------===//
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//===---------------------------------------------------------------------===//
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@@ -685,55 +662,6 @@ Though this probably isn't worth it.
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//===---------------------------------------------------------------------===//
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//===---------------------------------------------------------------------===//
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We need to teach the codegen to convert two-address INC instructions to LEA
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when the flags are dead (likewise dec). For example, on X86-64, compile:
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int foo(int A, int B) {
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return A+1;
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}
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to:
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_foo:
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leal 1(%edi), %eax
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ret
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instead of:
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_foo:
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incl %edi
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movl %edi, %eax
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ret
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Another example is:
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;; X's live range extends beyond the shift, so the register allocator
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;; cannot coalesce it with Y. Because of this, a copy needs to be
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;; emitted before the shift to save the register value before it is
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;; clobbered. However, this copy is not needed if the register
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;; allocator turns the shift into an LEA. This also occurs for ADD.
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; Check that the shift gets turned into an LEA.
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; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
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; RUN: not grep {mov E.X, E.X}
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@G = external global i32 ; <i32*> [#uses=3]
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define i32 @test1(i32 %X, i32 %Y) {
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%Z = add i32 %X, %Y ; <i32> [#uses=1]
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volatile store i32 %Y, i32* @G
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volatile store i32 %Z, i32* @G
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ret i32 %X
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}
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define i32 @test2(i32 %X) {
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%Z = add i32 %X, 1 ; <i32> [#uses=1]
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volatile store i32 %Z, i32* @G
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ret i32 %X
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}
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//===---------------------------------------------------------------------===//
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Sometimes it is better to codegen subtractions from a constant (e.g. 7-x) with
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Sometimes it is better to codegen subtractions from a constant (e.g. 7-x) with
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a neg instead of a sub instruction. Consider:
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a neg instead of a sub instruction. Consider:
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@@ -852,11 +780,6 @@ __Z11no_overflowjj:
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ret
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ret
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//===---------------------------------------------------------------------===//
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Re-materialize MOV32r0 etc. with xor instead of changing them to moves if the
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condition register is dead. xor reg reg is shorter than mov reg, #0.
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//===---------------------------------------------------------------------===//
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//===---------------------------------------------------------------------===//
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The following code:
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The following code:
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