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Added sextld + zextld DAG nodes.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24703 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2005-12-14 02:21:01 +00:00
parent 110dec2000
commit 3d2331dba7
1 changed files with 17 additions and 0 deletions
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17
lib/Target/TargetSelectionDAG.td
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@ -150,6 +150,12 @@ def SDTStore : SDTypeProfile<0, 2, [ // store
SDTCisPtrTy<1> SDTCisPtrTy<1>
]>; ]>;
def SDTIntExtLoad : SDTypeProfile<1, 3, [ // sextload, zextload
SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>,
SDTCisVTSmallerThanOp<3, 0>
]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Selection DAG Node Properties. // Selection DAG Node Properties.
// //
@ -173,6 +179,7 @@ class SDNode<string opcode, SDTypeProfile typeprof,
def set; def set;
def node; def node;
def srcvalue;
def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">; def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">;
def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">; def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">;
@ -245,6 +252,11 @@ def writeport : SDNode<"ISD::WRITEPORT" , SDTWritePort, [SDNPHasChain]>;
def load : SDNode<"ISD::LOAD" , SDTLoad, [SDNPHasChain]>; def load : SDNode<"ISD::LOAD" , SDTLoad, [SDNPHasChain]>;
def store : SDNode<"ISD::STORE" , SDTStore, [SDNPHasChain]>; def store : SDNode<"ISD::STORE" , SDTStore, [SDNPHasChain]>;
// Do not use sextld and zextld directly. Use sextload and zextload (see
// below) which pass in a dummy srcvalue node which tblgen will skip over.
def sextld : SDNode<"ISD::SEXTLOAD" , SDTIntExtLoad, [SDNPHasChain]>;
def zextld : SDNode<"ISD::ZEXTLOAD" , SDTIntExtLoad, [SDNPHasChain]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Selection DAG Condition Codes // Selection DAG Condition Codes
@ -311,6 +323,11 @@ def vtFP : PatLeaf<(vt), [{ return MVT::isFloatingPoint(N->getVT()); }]>;
def not : PatFrag<(ops node:$in), (xor node:$in, immAllOnes)>; def not : PatFrag<(ops node:$in), (xor node:$in, immAllOnes)>;
def ineg : PatFrag<(ops node:$in), (sub 0, node:$in)>; def ineg : PatFrag<(ops node:$in), (sub 0, node:$in)>;
// extending load fragments.
def sextload : PatFrag<(ops node:$ptr, node:$vt),
(sextld node:$ptr, srcvalue:$dummy, node:$vt)>;
def zextload : PatFrag<(ops node:$ptr, node:$vt),
(zextld node:$ptr, srcvalue:$dummy, node:$vt)>;
// setcc convenience fragments. // setcc convenience fragments.
def setoeq : PatFrag<(ops node:$lhs, node:$rhs), def setoeq : PatFrag<(ops node:$lhs, node:$rhs),