diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 4664440445f..6347e627f1a 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -128,32 +128,16 @@ def PSHUFLW_shuffle_mask : PatLeaf<(build_vector), [{ return X86::isPSHUFLWMask(N); }], SHUFFLE_get_pshuflw_imm>; -// Only use PSHUF* for v4f32 if SHUFP does not match. -def PSHUFD_fp_shuffle_mask : PatLeaf<(build_vector), [{ - return !X86::isSHUFPMask(N) && - X86::isPSHUFDMask(N); +def SHUFP_unary_shuffle_mask : PatLeaf<(build_vector), [{ + return X86::isPSHUFDMask(N); }], SHUFFLE_get_shuf_imm>; -def PSHUFHW_fp_shuffle_mask : PatLeaf<(build_vector), [{ - return !X86::isSHUFPMask(N) && - X86::isPSHUFHWMask(N); -}], SHUFFLE_get_pshufhw_imm>; - -def PSHUFLW_fp_shuffle_mask : PatLeaf<(build_vector), [{ - return !X86::isSHUFPMask(N) && - X86::isPSHUFLWMask(N); -}], SHUFFLE_get_pshuflw_imm>; - def SHUFP_shuffle_mask : PatLeaf<(build_vector), [{ return X86::isSHUFPMask(N); }], SHUFFLE_get_shuf_imm>; -// Only use SHUFP for v4i32 if PSHUF* do not match. -def SHUFP_int_shuffle_mask : PatLeaf<(build_vector), [{ - return !X86::isPSHUFDMask(N) && - !X86::isPSHUFHWMask(N) && - !X86::isPSHUFLWMask(N) && - X86::isSHUFPMask(N); +def PSHUFD_binary_shuffle_mask : PatLeaf<(build_vector), [{ + return X86::isSHUFPMask(N); }], SHUFFLE_get_shuf_imm>; //===----------------------------------------------------------------------===// @@ -1813,16 +1797,6 @@ def : Pat<(vector_shuffle (v4f32 VR128:$src), (undef), SSE_splat_mask:$sm), (v4f32 (SHUFPSrr VR128:$src, VR128:$src, SSE_splat_mask:$sm))>, Requires<[HasSSE1]>; -// Shuffle v4i32 with SHUFP* if others do not match. -def : Pat<(vector_shuffle (v4i32 VR128:$src1), (v4i32 VR128:$src2), - SHUFP_int_shuffle_mask:$sm), - (v4i32 (SHUFPSrr VR128:$src1, VR128:$src2, - SHUFP_int_shuffle_mask:$sm))>, Requires<[HasSSE2]>; -def : Pat<(vector_shuffle (v4i32 VR128:$src1), (load addr:$src2), - SHUFP_int_shuffle_mask:$sm), - (v4i32 (SHUFPSrm VR128:$src1, addr:$src2, - SHUFP_int_shuffle_mask:$sm))>, Requires<[HasSSE2]>; - // Special pshuf* cases: folding (bit_convert (loadv2i64 addr)). def : Pat<(v4i32 (vector_shuffle (bc_v4i32 (loadv2i64 addr:$src1)), (undef), PSHUFD_shuffle_mask:$src2)), @@ -1838,33 +1812,26 @@ def : Pat<(v8i16 (vector_shuffle (bc_v8i16 (loadv2i64 addr:$src1)), (undef), Requires<[HasSSE2]>; -// Special SHUFPSrr case: looks like a PSHUFD, like make both operands src1. -// FIXME: when we want non two-address code, then we should use PSHUFD! +// Special unary SHUFPSrr case. +// FIXME: when we want non two-address code, then we should use PSHUFD? def : Pat<(vector_shuffle (v4f32 VR128:$src1), (undef), - PSHUFD_fp_shuffle_mask:$sm), - (v4f32 (SHUFPSrr VR128:$src1, VR128:$src1, PSHUFD_fp_shuffle_mask:$sm))>, + SHUFP_unary_shuffle_mask:$sm), + (v4f32 (SHUFPSrr VR128:$src1, VR128:$src1, SHUFP_unary_shuffle_mask:$sm))>, Requires<[HasSSE1]>; -// Shuffle v4f32 with PSHUF* if others do not match. +// Unary v4f32 shuffle with PSHUF* in order to fold a load. def : Pat<(vector_shuffle (loadv4f32 addr:$src1), (undef), - PSHUFD_fp_shuffle_mask:$sm), - (v4f32 (PSHUFDmi addr:$src1, PSHUFD_fp_shuffle_mask:$sm))>, - Requires<[HasSSE2]>; -def : Pat<(vector_shuffle (v4f32 VR128:$src1), (undef), - PSHUFHW_fp_shuffle_mask:$sm), - (v4f32 (PSHUFHWri VR128:$src1, PSHUFHW_fp_shuffle_mask:$sm))>, - Requires<[HasSSE2]>; -def : Pat<(vector_shuffle (loadv4f32 addr:$src1), (undef), - PSHUFHW_fp_shuffle_mask:$sm), - (v4f32 (PSHUFHWmi addr:$src1, PSHUFHW_fp_shuffle_mask:$sm))>, - Requires<[HasSSE2]>; -def : Pat<(vector_shuffle (v4f32 VR128:$src1), (undef), - PSHUFLW_fp_shuffle_mask:$sm), - (v4f32 (PSHUFLWri VR128:$src1, PSHUFLW_fp_shuffle_mask:$sm))>, - Requires<[HasSSE2]>; -def : Pat<(vector_shuffle (loadv4f32 addr:$src1), (undef), - PSHUFLW_fp_shuffle_mask:$sm), - (v4f32 (PSHUFLWmi addr:$src1, PSHUFLW_fp_shuffle_mask:$sm))>, + SHUFP_unary_shuffle_mask:$sm), + (v4f32 (PSHUFDmi addr:$src1, SHUFP_unary_shuffle_mask:$sm))>, Requires<[HasSSE2]>; +// Special binary v4i32 shuffle cases with SHUFPS. +def : Pat<(vector_shuffle (v4i32 VR128:$src1), (v4i32 VR128:$src2), + PSHUFD_binary_shuffle_mask:$sm), + (v4i32 (SHUFPSrr VR128:$src1, VR128:$src2, + PSHUFD_binary_shuffle_mask:$sm))>, Requires<[HasSSE2]>; +def : Pat<(vector_shuffle (v4i32 VR128:$src1), (load addr:$src2), + PSHUFD_binary_shuffle_mask:$sm), + (v4i32 (SHUFPSrm VR128:$src1, addr:$src2, + PSHUFD_binary_shuffle_mask:$sm))>, Requires<[HasSSE2]>; // vector_shuffle v1, , <0, 0, 1, 1, ...> def : Pat<(v4f32 (vector_shuffle VR128:$src, (undef),