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Target/X86: Tweak allocating shadow area (aka home) on Win64. It must be enough for caller to allocate one.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124949 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
NAKAMURA Takumi 2011-02-05 15:11:32 +00:00
parent fb840c9117
commit 3f4be4fb86
7 changed files with 37 additions and 29 deletions
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5
lib/Target/X86/X86FrameLowering.cpp
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@ -397,11 +397,6 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
if (HasFP) MinSize += SlotSize;
StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
MFI->setStackSize(StackSize);
} else if (IsWin64) {
// We need to always allocate 32 bytes as register spill area.
// FIXME: We might reuse these 32 bytes for leaf functions.
StackSize += 32;
MFI->setStackSize(StackSize);
}
// Insert stack pointer adjustment for later moving of return addr. Only

3
lib/Target/X86/X86FrameLowering.h
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@ -28,8 +28,7 @@ public:
explicit X86FrameLowering(const X86TargetMachine &tm, const X86Subtarget &sti)
: TargetFrameLowering(StackGrowsDown,
sti.getStackAlignment(),
(sti.isTargetWin64() ? -40 :
(sti.is64Bit() ? -8 : -4))),
(sti.is64Bit() ? -8 : -4)),
TM(tm), STI(sti) {
}

21
lib/Target/X86/X86ISelLowering.cpp
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@ -1544,6 +1544,12 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain,
SmallVector<CCValAssign, 16> ArgLocs;
CCState CCInfo(CallConv, isVarArg, getTargetMachine(),
ArgLocs, *DAG.getContext());
// Allocate shadow area for Win64
if (IsWin64) {
CCInfo.AllocateStack(32, 8);
}
CCInfo.AnalyzeFormalArguments(Ins, CC_X86);
unsigned LastVal = ~0U;
@ -1778,8 +1784,7 @@ X86TargetLowering::LowerMemOpCallTo(SDValue Chain,
DebugLoc dl, SelectionDAG &DAG,
const CCValAssign &VA,
ISD::ArgFlagsTy Flags) const {
const unsigned FirstStackArgOffset = (Subtarget->isTargetWin64() ? 32 : 0);
unsigned LocMemOffset = FirstStackArgOffset + VA.getLocMemOffset();
unsigned LocMemOffset = VA.getLocMemOffset();
SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset);
PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff);
if (Flags.isByVal())
@ -1864,6 +1869,12 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
SmallVector<CCValAssign, 16> ArgLocs;
CCState CCInfo(CallConv, isVarArg, getTargetMachine(),
ArgLocs, *DAG.getContext());
// Allocate shadow area for Win64
if (IsWin64) {
CCInfo.AllocateStack(32, 8);
}
CCInfo.AnalyzeCallOperands(Outs, CC_X86);
// Get a count of how many bytes are to be pushed on the stack.
@ -2447,6 +2458,12 @@ X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
SmallVector<CCValAssign, 16> ArgLocs;
CCState CCInfo(CalleeCC, isVarArg, getTargetMachine(),
ArgLocs, *DAG.getContext());
// Allocate shadow area for Win64
if (Subtarget->isTargetWin64()) {
CCInfo.AllocateStack(32, 8);
}
CCInfo.AnalyzeCallOperands(Outs, CC_X86);
if (CCInfo.getNextStackOffset()) {
MachineFunction &MF = DAG.getMachineFunction();

9
test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll
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@ -1,9 +1,8 @@
; RUN: llc < %s | grep "subq.*\\\$40, \\\%rsp"
target triple = "x86_64-pc-mingw64"
; RUN: llc -mtriple=x86_64-pc-mingw64 < %s | FileCheck %s
; CHECK-NOT: -{{[1-9][0-9]*}}(%rsp)
define x86_fp80 @a(i64 %x) nounwind readnone {
entry:
%conv = sitofp i64 %x to x86_fp80 ; <x86_fp80> [#uses=1]
ret x86_fp80 %conv
%conv = sitofp i64 %x to x86_fp80 ; <x86_fp80> [#uses=1]
ret x86_fp80 %conv
}

14
test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll
View File

@ -1,12 +1,10 @@
; RUN: llc < %s -o %t1
; RUN: grep "subq.*\\\$72, \\\%rsp" %t1
; RUN: grep "movaps \\\%xmm8, 32\\\(\\\%rsp\\\)" %t1
; RUN: grep "movaps \\\%xmm7, 48\\\(\\\%rsp\\\)" %t1
target triple = "x86_64-pc-mingw64"
; RUN: llc -mtriple=x86_64-pc-mingw64 < %s | FileCheck %s
; CHECK: subq $40, %rsp
; CHECK: movaps %xmm8, (%rsp)
; CHECK: movaps %xmm7, 16(%rsp)
define i32 @a() nounwind {
entry:
tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind
ret i32 undef
tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind
ret i32 undef
}

4
test/CodeGen/X86/win64_params.ll
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@ -4,8 +4,8 @@
; on the stack.
define i32 @f6(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6) nounwind readnone optsize {
entry:
; CHECK: movl 80(%rsp), %eax
; CHECK: addl 72(%rsp), %eax
; CHECK: movl 48(%rsp), %eax
; CHECK: addl 40(%rsp), %eax
%add = add nsw i32 %p6, %p5
ret i32 %add
}

10
test/CodeGen/X86/win64_vararg.ll
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@ -5,11 +5,11 @@
; calculated.
define void @average_va(i32 %count, ...) nounwind {
entry:
; CHECK: subq $40, %rsp
; CHECK: movq %r9, 72(%rsp)
; CHECK: movq %r8, 64(%rsp)
; CHECK: movq %rdx, 56(%rsp)
; CHECK: leaq 56(%rsp), %rax
; CHECK: pushq
; CHECK: movq %r9, 40(%rsp)
; CHECK: movq %r8, 32(%rsp)
; CHECK: movq %rdx, 24(%rsp)
; CHECK: leaq 24(%rsp), %rax
%ap = alloca i8*, align 8 ; <i8**> [#uses=1]
%ap1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]