From 3fe09b705c1604d2f90311d73d9e7f9562cbf9d8 Mon Sep 17 00:00:00 2001
From: Saleem Abdulrasool <compnerd@compnerd.org>
Date: Wed, 7 May 2014 03:03:31 +0000
Subject: [PATCH] ARM: mark additional instructions as MachineFrameSetup

Mark up additional instructions which are part of the function prologue as
MachineFrameSetup.  These instructions are part of the function prologue,
emitted by the PEI pass to setup the stack for use in the activating frame.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208153 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMFrameLowering.cpp | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/lib/Target/ARM/ARMFrameLowering.cpp b/lib/Target/ARM/ARMFrameLowering.cpp
index 8da7fb89401..c0f8a8d9025 100644
--- a/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/lib/Target/ARM/ARMFrameLowering.cpp
@@ -299,10 +299,12 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
 
     if (NumWords < 65536)
       AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), ARM::R4)
-                     .addImm(NumWords));
+                     .addImm(NumWords)
+                     .setMIFlags(MachineInstr::FrameSetup));
     else
       BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ARM::R4)
-        .addImm(NumWords);
+        .addImm(NumWords)
+        .setMIFlags(MachineInstr::FrameSetup);
 
     switch (TM.getCodeModel()) {
     case CodeModel::Small:
@@ -312,17 +314,20 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
       BuildMI(MBB, MBBI, dl, TII.get(ARM::tBL))
         .addImm((unsigned)ARMCC::AL).addReg(0)
         .addExternalSymbol("__chkstk")
-        .addReg(ARM::R4, RegState::Implicit);
+        .addReg(ARM::R4, RegState::Implicit)
+        .setMIFlags(MachineInstr::FrameSetup);
       break;
     case CodeModel::Large:
     case CodeModel::JITDefault:
       BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ARM::R12)
-        .addExternalSymbol("__chkstk");
+        .addExternalSymbol("__chkstk")
+        .setMIFlags(MachineInstr::FrameSetup);
 
       BuildMI(MBB, MBBI, dl, TII.get(ARM::tBLXr))
         .addImm((unsigned)ARMCC::AL).addReg(0)
         .addReg(ARM::R12, RegState::Kill)
-        .addReg(ARM::R4, RegState::Implicit);
+        .addReg(ARM::R4, RegState::Implicit)
+        .setMIFlags(MachineInstr::FrameSetup);
       break;
     }