mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 19:31:58 +00:00
Flesh out tests for Thumb2 encodings of NEON instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118837 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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36
test/MC/ARM/neont2-cmp-encoding.s
Normal file
36
test/MC/ARM/neont2-cmp-encoding.s
Normal file
@ -0,0 +1,36 @@
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
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.code 16
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@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xff]
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vcvt.s32.f32 d16, d16
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@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xa0,0x07,0xfb,0xff]
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vcvt.u32.f32 d16, d16
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@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xff]
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vcvt.f32.s32 d16, d16
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@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xa0,0x06,0xfb,0xff]
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vcvt.f32.u32 d16, d16
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@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xff]
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vcvt.s32.f32 q8, q8
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@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xe0,0x07,0xfb,0xff]
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vcvt.u32.f32 q8, q8
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@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0x60,0x06,0xfb,0xff]
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vcvt.f32.s32 q8, q8
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@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xe0,0x06,0xfb,0xff]
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vcvt.f32.u32 q8, q8
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@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xef]
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vcvt.s32.f32 d16, d16, #1
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@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xff]
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vcvt.u32.f32 d16, d16, #1
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@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xef]
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vcvt.f32.s32 d16, d16, #1
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@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xff]
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vcvt.f32.u32 d16, d16, #1
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@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xef]
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vcvt.s32.f32 q8, q8, #1
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@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xff]
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vcvt.u32.f32 q8, q8, #1
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@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xef]
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vcvt.f32.s32 q8, q8, #1
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@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xff]
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vcvt.f32.u32 q8, q8, #1
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60
test/MC/ARM/neont2-minmax-encoding.s
Normal file
60
test/MC/ARM/neont2-minmax-encoding.s
Normal file
@ -0,0 +1,60 @@
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
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.code 16
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@ CHECK: vmin.s8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xef]
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vmin.s8 d16, d16, d17
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@ CHECK: vmin.s16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xef]
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vmin.s16 d16, d16, d17
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@ CHECK: vmin.s32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xef]
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vmin.s32 d16, d16, d17
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@ CHECK: vmin.u8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xff]
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vmin.u8 d16, d16, d17
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@ CHECK: vmin.u16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xff]
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vmin.u16 d16, d16, d17
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@ CHECK: vmin.u32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xff]
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vmin.u32 d16, d16, d17
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@ CHECK: vmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xef]
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vmin.f32 d16, d16, d17
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@ CHECK: vmin.s8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xef]
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vmin.s8 q8, q8, q9
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@ CHECK: vmin.s16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xef]
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vmin.s16 q8, q8, q9
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@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xef]
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vmin.s32 q8, q8, q9
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@ CHECK: vmin.u8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xff]
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vmin.u8 q8, q8, q9
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@ CHECK: vmin.u16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xff]
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vmin.u16 q8, q8, q9
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@ CHECK: vmin.u32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xff]
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vmin.u32 q8, q8, q9
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@ CHECK: vmin.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x60,0xef]
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vmin.f32 q8, q8, q9
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@ CHECK: vmax.s8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xef]
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vmax.s8 d16, d16, d17
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@ CHECK: vmax.s16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xef]
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vmax.s16 d16, d16, d17
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@ CHECK: vmax.s32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xef]
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vmax.s32 d16, d16, d17
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@ CHECK: vmax.u8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xff]
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vmax.u8 d16, d16, d17
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@ CHECK: vmax.u16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xff]
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vmax.u16 d16, d16, d17
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@ CHECK: vmax.u32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xff]
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vmax.u32 d16, d16, d17
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@ CHECK: vmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xef]
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vmax.f32 d16, d16, d17
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@ CHECK: vmax.s8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xef]
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vmax.s8 q8, q8, q9
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@ CHECK: vmax.s16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xef]
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vmax.s16 q8, q8, q9
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@ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xef]
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vmax.s32 q8, q8, q9
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@ CHECK: vmax.u8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xff]
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vmax.u8 q8, q8, q9
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@ CHECK: vmax.u16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xff]
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vmax.u16 q8, q8, q9
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@ CHECK: vmax.u32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xff]
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vmax.u32 q8, q8, q9
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@ CHECK: vmax.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x40,0xef]
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vmax.f32 q8, q8, q9
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58
test/MC/ARM/neont2-mul-encoding.s
Normal file
58
test/MC/ARM/neont2-mul-encoding.s
Normal file
@ -0,0 +1,58 @@
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
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.code 16
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@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xef]
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vmul.i8 d16, d16, d17
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@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0xb1,0x09,0x50,0xef]
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vmul.i16 d16, d16, d17
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@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0xb1,0x09,0x60,0xef]
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vmul.i32 d16, d16, d17
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@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0xb1,0x0d,0x40,0xff]
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vmul.f32 d16, d16, d17
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@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xef]
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vmul.i8 q8, q8, q9
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@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0xf2,0x09,0x50,0xef]
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vmul.i16 q8, q8, q9
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@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0xf2,0x09,0x60,0xef]
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vmul.i32 q8, q8, q9
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@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0xf2,0x0d,0x40,0xff]
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vmul.f32 q8, q8, q9
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@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xff]
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vmul.p8 d16, d16, d17
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@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xff]
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vmul.p8 q8, q8, q9
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@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xef]
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vqdmulh.s16 d16, d16, d17
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@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xef]
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vqdmulh.s32 d16, d16, d17
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@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xef]
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vqdmulh.s16 q8, q8, q9
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@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xef]
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vqdmulh.s32 q8, q8, q9
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@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xff]
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vqrdmulh.s16 d16, d16, d17
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@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xff]
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vqrdmulh.s32 d16, d16, d17
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@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xff]
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vqrdmulh.s16 q8, q8, q9
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@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xff]
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vqrdmulh.s32 q8, q8, q9
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@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xef]
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vmull.s8 q8, d16, d17
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@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xef]
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vmull.s16 q8, d16, d17
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@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xef]
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vmull.s32 q8, d16, d17
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@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xff]
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vmull.u8 q8, d16, d17
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@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xff]
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vmull.u16 q8, d16, d17
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@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xff]
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vmull.u32 q8, d16, d17
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@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xa1,0x0e,0xc0,0xef]
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vmull.p8 q8, d16, d17
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@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0d,0xd0,0xef]
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vqdmull.s16 q8, d16, d17
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@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0d,0xe0,0xef]
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vqdmull.s32 q8, d16, d17
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32
test/MC/ARM/neont2-neg-encoding.s
Normal file
32
test/MC/ARM/neont2-neg-encoding.s
Normal file
@ -0,0 +1,32 @@
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
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.code 16
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@ CHECK: vneg.s8 d16, d16 @ encoding: [0xa0,0x03,0xf1,0xff]
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vneg.s8 d16, d16
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@ CHECK: vneg.s16 d16, d16 @ encoding: [0xa0,0x03,0xf5,0xff]
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vneg.s16 d16, d16
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@ CHECK: vneg.s32 d16, d16 @ encoding: [0xa0,0x03,0xf9,0xff]
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vneg.s32 d16, d16
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@ CHECK: vneg.f32 d16, d16 @ encoding: [0xa0,0x07,0xf9,0xff]
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vneg.f32 d16, d16
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@ CHECK: vneg.s8 q8, q8 @ encoding: [0xe0,0x03,0xf1,0xff]
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vneg.s8 q8, q8
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@ CHECK: vneg.s16 q8, q8 @ encoding: [0xe0,0x03,0xf5,0xff]
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vneg.s16 q8, q8
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@ CHECK: vneg.s32 q8, q8 @ encoding: [0xe0,0x03,0xf9,0xff]
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vneg.s32 q8, q8
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@ CHECK: vneg.f32 q8, q8 @ encoding: [0xe0,0x07,0xf9,0xff]
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vneg.f32 q8, q8
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@ CHECK: vqneg.s8 d16, d16 @ encoding: [0xa0,0x07,0xf0,0xff]
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vqneg.s8 d16, d16
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@ CHECK: vqneg.s16 d16, d16 @ encoding: [0xa0,0x07,0xf4,0xff]
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vqneg.s16 d16, d16
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@ CHECK: vqneg.s32 d16, d16 @ encoding: [0xa0,0x07,0xf8,0xff]
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vqneg.s32 d16, d16
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@ CHECK: vqneg.s8 q8, q8 @ encoding: [0xe0,0x07,0xf0,0xff]
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vqneg.s8 q8, q8
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@ CHECK: vqneg.s16 q8, q8 @ encoding: [0xe0,0x07,0xf4,0xff]
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vqneg.s16 q8, q8
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@ CHECK: vqneg.s32 q8, q8 @ encoding: [0xe0,0x07,0xf8,0xff]
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vqneg.s32 q8, q8
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28
test/MC/ARM/neont2-reciprocal-encoding.s
Normal file
28
test/MC/ARM/neont2-reciprocal-encoding.s
Normal file
@ -0,0 +1,28 @@
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
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.code 16
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@ CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xff]
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vrecpe.u32 d16, d16
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@ CHECK: vrecpe.u32 q8, q8 @ encoding: [0x60,0x04,0xfb,0xff]
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vrecpe.u32 q8, q8
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@ CHECK: vrecpe.f32 d16, d16 @ encoding: [0x20,0x05,0xfb,0xff]
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vrecpe.f32 d16, d16
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@ CHECK: vrecpe.f32 q8, q8 @ encoding: [0x60,0x05,0xfb,0xff]
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vrecpe.f32 q8, q8
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@ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x40,0xef]
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vrecps.f32 d16, d16, d17
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@ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x40,0xef]
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vrecps.f32 q8, q8, q9
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@ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xa0,0x04,0xfb,0xff]
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vrsqrte.u32 d16, d16
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@ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xe0,0x04,0xfb,0xff]
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vrsqrte.u32 q8, q8
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@ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xa0,0x05,0xfb,0xff]
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vrsqrte.f32 d16, d16
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@ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xe0,0x05,0xfb,0xff]
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vrsqrte.f32 q8, q8
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@ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x60,0xef]
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vrsqrts.f32 d16, d16, d17
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@ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x60,0xef]
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vrsqrts.f32 q8, q8, q9
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26
test/MC/ARM/neont2-reverse-encoding.s
Normal file
26
test/MC/ARM/neont2-reverse-encoding.s
Normal file
@ -0,0 +1,26 @@
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
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@ CHECK: vrev64.8 d16, d16 @ encoding: [0x20,0x00,0xf0,0xff]
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vrev64.8 d16, d16
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@ CHECK: vrev64.16 d16, d16 @ encoding: [0x20,0x00,0xf4,0xff]
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vrev64.16 d16, d16
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@ CHECK: vrev64.32 d16, d16 @ encoding: [0x20,0x00,0xf8,0xff]
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vrev64.32 d16, d16
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@ CHECK: vrev64.8 q8, q8 @ encoding: [0x60,0x00,0xf0,0xff]
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vrev64.8 q8, q8
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@ CHECK: vrev64.16 q8, q8 @ encoding: [0x60,0x00,0xf4,0xff]
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vrev64.16 q8, q8
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@ CHECK: vrev64.32 q8, q8 @ encoding: [0x60,0x00,0xf8,0xff]
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vrev64.32 q8, q8
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@ CHECK: vrev32.8 d16, d16 @ encoding: [0xa0,0x00,0xf0,0xff]
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vrev32.8 d16, d16
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@ CHECK: vrev32.16 d16, d16 @ encoding: [0xa0,0x00,0xf4,0xff]
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vrev32.16 d16, d16
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@ CHECK: vrev32.8 q8, q8 @ encoding: [0xe0,0x00,0xf0,0xff]
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vrev32.8 q8, q8
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@ CHECK: vrev32.16 q8, q8 @ encoding: [0xe0,0x00,0xf4,0xff]
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vrev32.16 q8, q8
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@ CHECK: vrev16.8 d16, d16 @ encoding: [0x20,0x01,0xf0,0xff]
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vrev16.8 d16, d16
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@ CHECK: vrev16.8 q8, q8 @ encoding: [0x60,0x01,0xf0,0xff]
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vrev16.8 q8, q8
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152
test/MC/ARM/neont2-satshift-encoding.s
Normal file
152
test/MC/ARM/neont2-satshift-encoding.s
Normal file
@ -0,0 +1,152 @@
|
||||
@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
|
||||
|
||||
.code 16
|
||||
|
||||
@ CHECK: vqshl.s8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xef]
|
||||
vqshl.s8 d16, d16, d17
|
||||
@ CHECK: vqshl.s16 d16, d16, d17 @ encoding: [0xb0,0x04,0x51,0xef]
|
||||
vqshl.s16 d16, d16, d17
|
||||
@ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xef]
|
||||
vqshl.s32 d16, d16, d17
|
||||
@ CHECK: vqshl.s64 d16, d16, d17 @ encoding: [0xb0,0x04,0x71,0xef]
|
||||
vqshl.s64 d16, d16, d17
|
||||
@ CHECK: vqshl.u8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xff]
|
||||
vqshl.u8 d16, d16, d17
|
||||
@ CHECK: vqshl.u16 d16, d16, d17 @ encoding: [0xb0,0x04,0x51,0xff]
|
||||
vqshl.u16 d16, d16, d17
|
||||
@ CHECK: vqshl.u32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xff]
|
||||
vqshl.u32 d16, d16, d17
|
||||
@ CHECK: vqshl.u64 d16, d16, d17 @ encoding: [0xb0,0x04,0x71,0xff]
|
||||
vqshl.u64 d16, d16, d17
|
||||
@ CHECK: vqshl.s8 q8, q8, q9 @ encoding: [0xf0,0x04,0x42,0xef]
|
||||
vqshl.s8 q8, q8, q9
|
||||
@ CHECK: vqshl.s16 q8, q8, q9 @ encoding: [0xf0,0x04,0x52,0xef]
|
||||
vqshl.s16 q8, q8, q9
|
||||
@ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xef]
|
||||
vqshl.s32 q8, q8, q9
|
||||
@ CHECK: vqshl.s64 q8, q8, q9 @ encoding: [0xf0,0x04,0x72,0xef]
|
||||
vqshl.s64 q8, q8, q9
|
||||
@ CHECK: vqshl.u8 q8, q8, q9 @ encoding: [0xf0,0x04,0x42,0xff]
|
||||
vqshl.u8 q8, q8, q9
|
||||
@ CHECK: vqshl.u16 q8, q8, q9 @ encoding: [0xf0,0x04,0x52,0xff]
|
||||
vqshl.u16 q8, q8, q9
|
||||
@ CHECK: vqshl.u32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xff]
|
||||
vqshl.u32 q8, q8, q9
|
||||
@ CHECK: vqshl.u64 q8, q8, q9 @ encoding: [0xf0,0x04,0x72,0xff]
|
||||
vqshl.u64 q8, q8, q9
|
||||
@ CHECK: vqshl.s8 d16, d16, #7 @ encoding: [0x30,0x07,0xcf,0xef]
|
||||
vqshl.s8 d16, d16, #7
|
||||
@ CHECK: vqshl.s16 d16, d16, #15 @ encoding: [0x30,0x07,0xdf,0xef]
|
||||
vqshl.s16 d16, d16, #15
|
||||
@ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xef]
|
||||
vqshl.s32 d16, d16, #31
|
||||
@ CHECK: vqshl.s64 d16, d16, #63 @ encoding: [0xb0,0x07,0xff,0xef]
|
||||
vqshl.s64 d16, d16, #63
|
||||
@ CHECK: vqshl.u8 d16, d16, #7 @ encoding: [0x30,0x07,0xcf,0xff]
|
||||
vqshl.u8 d16, d16, #7
|
||||
@ CHECK: vqshl.u16 d16, d16, #15 @ encoding: [0x30,0x07,0xdf,0xff]
|
||||
vqshl.u16 d16, d16, #15
|
||||
@ CHECK: vqshl.u32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xff]
|
||||
vqshl.u32 d16, d16, #31
|
||||
@ CHECK: vqshl.u64 d16, d16, #63 @ encoding: [0xb0,0x07,0xff,0xff]
|
||||
vqshl.u64 d16, d16, #63
|
||||
@ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0x30,0x06,0xcf,0xff]
|
||||
vqshlu.s8 d16, d16, #7
|
||||
@ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0x30,0x06,0xdf,0xff]
|
||||
vqshlu.s16 d16, d16, #15
|
||||
@ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xff]
|
||||
vqshlu.s32 d16, d16, #31
|
||||
@ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xb0,0x06,0xff,0xff]
|
||||
vqshlu.s64 d16, d16, #63
|
||||
@ CHECK: vqshl.s8 q8, q8, #7 @ encoding: [0x70,0x07,0xcf,0xef]
|
||||
vqshl.s8 q8, q8, #7
|
||||
@ CHECK: vqshl.s16 q8, q8, #15 @ encoding: [0x70,0x07,0xdf,0xef]
|
||||
vqshl.s16 q8, q8, #15
|
||||
@ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xef]
|
||||
vqshl.s32 q8, q8, #31
|
||||
@ CHECK: vqshl.s64 q8, q8, #63 @ encoding: [0xf0,0x07,0xff,0xef]
|
||||
vqshl.s64 q8, q8, #63
|
||||
@ CHECK: vqshl.u8 q8, q8, #7 @ encoding: [0x70,0x07,0xcf,0xff]
|
||||
vqshl.u8 q8, q8, #7
|
||||
@ CHECK: vqshl.u16 q8, q8, #15 @ encoding: [0x70,0x07,0xdf,0xff]
|
||||
vqshl.u16 q8, q8, #15
|
||||
@ CHECK: vqshl.u32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xff]
|
||||
vqshl.u32 q8, q8, #31
|
||||
@ CHECK: vqshl.u64 q8, q8, #63 @ encoding: [0xf0,0x07,0xff,0xff]
|
||||
vqshl.u64 q8, q8, #63
|
||||
@ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0x70,0x06,0xcf,0xff]
|
||||
vqshlu.s8 q8, q8, #7
|
||||
@ CHECK: vqshlu.s16 q8, q8, #15 @ encoding: [0x70,0x06,0xdf,0xff]
|
||||
vqshlu.s16 q8, q8, #15
|
||||
@ CHECK: vqshlu.s32 q8, q8, #31 @ encoding: [0x70,0x06,0xff,0xff]
|
||||
vqshlu.s32 q8, q8, #31
|
||||
@ CHECK: vqshlu.s64 q8, q8, #63 @ encoding: [0xf0,0x06,0xff,0xff]
|
||||
vqshlu.s64 q8, q8, #63
|
||||
@ CHECK: vqrshl.s8 d16, d16, d17 @ encoding: [0xb0,0x05,0x41,0xef]
|
||||
vqrshl.s8 d16, d16, d17
|
||||
@ CHECK: vqrshl.s16 d16, d16, d17 @ encoding: [0xb0,0x05,0x51,0xef]
|
||||
vqrshl.s16 d16, d16, d17
|
||||
@ CHECK: vqrshl.s32 d16, d16, d17 @ encoding: [0xb0,0x05,0x61,0xef]
|
||||
vqrshl.s32 d16, d16, d17
|
||||
@ CHECK: vqrshl.s64 d16, d16, d17 @ encoding: [0xb0,0x05,0x71,0xef]
|
||||
vqrshl.s64 d16, d16, d17
|
||||
@ CHECK: vqrshl.u8 d16, d16, d17 @ encoding: [0xb0,0x05,0x41,0xff]
|
||||
vqrshl.u8 d16, d16, d17
|
||||
@ CHECK: vqrshl.u16 d16, d16, d17 @ encoding: [0xb0,0x05,0x51,0xff]
|
||||
vqrshl.u16 d16, d16, d17
|
||||
@ CHECK: vqrshl.u32 d16, d16, d17 @ encoding: [0xb0,0x05,0x61,0xff]
|
||||
vqrshl.u32 d16, d16, d17
|
||||
@ CHECK: vqrshl.u64 d16, d16, d17 @ encoding: [0xb0,0x05,0x71,0xff]
|
||||
vqrshl.u64 d16, d16, d17
|
||||
@ CHECK: vqrshl.s8 q8, q8, q9 @ encoding: [0xf0,0x05,0x42,0xef]
|
||||
vqrshl.s8 q8, q8, q9
|
||||
@ CHECK: vqrshl.s16 q8, q8, q9 @ encoding: [0xf0,0x05,0x52,0xef]
|
||||
vqrshl.s16 q8, q8, q9
|
||||
@ CHECK: vqrshl.s32 q8, q8, q9 @ encoding: [0xf0,0x05,0x62,0xef]
|
||||
vqrshl.s32 q8, q8, q9
|
||||
@ CHECK: vqrshl.s64 q8, q8, q9 @ encoding: [0xf0,0x05,0x72,0xef]
|
||||
vqrshl.s64 q8, q8, q9
|
||||
@ CHECK: vqrshl.u8 q8, q8, q9 @ encoding: [0xf0,0x05,0x42,0xff]
|
||||
vqrshl.u8 q8, q8, q9
|
||||
@ CHECK: vqrshl.u16 q8, q8, q9 @ encoding: [0xf0,0x05,0x52,0xff]
|
||||
vqrshl.u16 q8, q8, q9
|
||||
@ CHECK: vqrshl.u32 q8, q8, q9 @ encoding: [0xf0,0x05,0x62,0xff]
|
||||
vqrshl.u32 q8, q8, q9
|
||||
@ CHECK: vqrshl.u64 q8, q8, q9 @ encoding: [0xf0,0x05,0x72,0xff]
|
||||
vqrshl.u64 q8, q8, q9
|
||||
@ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xef]
|
||||
vqshrn.s16 d16, q8, #8
|
||||
@ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xef]
|
||||
vqshrn.s32 d16, q8, #16
|
||||
@ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xef]
|
||||
vqshrn.s64 d16, q8, #32
|
||||
@ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xff]
|
||||
vqshrn.u16 d16, q8, #8
|
||||
@ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xff]
|
||||
vqshrn.u32 d16, q8, #16
|
||||
@ CHECK: vqshrn.u64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xff]
|
||||
vqshrn.u64 d16, q8, #32
|
||||
@ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xff]
|
||||
vqshrun.s16 d16, q8, #8
|
||||
@ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xff]
|
||||
vqshrun.s32 d16, q8, #16
|
||||
@ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xff]
|
||||
vqshrun.s64 d16, q8, #32
|
||||
@ CHECK: vqrshrn.s16 d16, q8, #8 @ encoding: [0x70,0x09,0xc8,0xef]
|
||||
vqrshrn.s16 d16, q8, #8
|
||||
@ CHECK: vqrshrn.s32 d16, q8, #16 @ encoding: [0x70,0x09,0xd0,0xef]
|
||||
vqrshrn.s32 d16, q8, #16
|
||||
@ CHECK: vqrshrn.s64 d16, q8, #32 @ encoding: [0x70,0x09,0xe0,0xef]
|
||||
vqrshrn.s64 d16, q8, #32
|
||||
@ CHECK: vqrshrn.u16 d16, q8, #8 @ encoding: [0x70,0x09,0xc8,0xff]
|
||||
vqrshrn.u16 d16, q8, #8
|
||||
@ CHECK: vqrshrn.u32 d16, q8, #16 @ encoding: [0x70,0x09,0xd0,0xff]
|
||||
vqrshrn.u32 d16, q8, #16
|
||||
@ CHECK: vqrshrn.u64 d16, q8, #32 @ encoding: [0x70,0x09,0xe0,0xff]
|
||||
vqrshrn.u64 d16, q8, #32
|
||||
@ CHECK: vqrshrun.s16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xff]
|
||||
vqrshrun.s16 d16, q8, #8
|
||||
@ CHECK: vqrshrun.s32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xff]
|
||||
vqrshrun.s32 d16, q8, #16
|
||||
@ CHECK: vqrshrun.s64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xff]
|
||||
vqrshrun.s64 d16, q8, #32
|
162
test/MC/ARM/neont2-shift-encoding.s
Normal file
162
test/MC/ARM/neont2-shift-encoding.s
Normal file
@ -0,0 +1,162 @@
|
||||
@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
|
||||
|
||||
.code 16
|
||||
|
||||
@ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0xa1,0x04,0x40,0xff]
|
||||
vshl.u8 d16, d17, d16
|
||||
@ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0xa1,0x04,0x50,0xff]
|
||||
vshl.u16 d16, d17, d16
|
||||
@ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0xa1,0x04,0x60,0xff]
|
||||
vshl.u32 d16, d17, d16
|
||||
@ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0xa1,0x04,0x70,0xff]
|
||||
vshl.u64 d16, d17, d16
|
||||
@ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0x30,0x05,0xcf,0xef]
|
||||
vshl.i8 d16, d16, #7
|
||||
@ CHECK: vshl.i16 d16, d16, #15 @ encoding: [0x30,0x05,0xdf,0xef]
|
||||
vshl.i16 d16, d16, #15
|
||||
@ CHECK: vshl.i32 d16, d16, #31 @ encoding: [0x30,0x05,0xff,0xef]
|
||||
vshl.i32 d16, d16, #31
|
||||
@ CHECK: vshl.i64 d16, d16, #63 @ encoding: [0xb0,0x05,0xff,0xef]
|
||||
vshl.i64 d16, d16, #63
|
||||
@ CHECK: vshl.u8 q8, q9, q8 @ encoding: [0xe2,0x04,0x40,0xff]
|
||||
vshl.u8 q8, q9, q8
|
||||
@ CHECK: vshl.u16 q8, q9, q8 @ encoding: [0xe2,0x04,0x50,0xff]
|
||||
vshl.u16 q8, q9, q8
|
||||
@ CHECK: vshl.u32 q8, q9, q8 @ encoding: [0xe2,0x04,0x60,0xff]
|
||||
vshl.u32 q8, q9, q8
|
||||
@ CHECK: vshl.u64 q8, q9, q8 @ encoding: [0xe2,0x04,0x70,0xff]
|
||||
vshl.u64 q8, q9, q8
|
||||
@ CHECK: vshl.i8 q8, q8, #7 @ encoding: [0x70,0x05,0xcf,0xef]
|
||||
vshl.i8 q8, q8, #7
|
||||
@ CHECK: vshl.i16 q8, q8, #15 @ encoding: [0x70,0x05,0xdf,0xef]
|
||||
vshl.i16 q8, q8, #15
|
||||
@ CHECK: vshl.i32 q8, q8, #31 @ encoding: [0x70,0x05,0xff,0xef]
|
||||
vshl.i32 q8, q8, #31
|
||||
@ CHECK: vshl.i64 q8, q8, #63 @ encoding: [0xf0,0x05,0xff,0xef]
|
||||
vshl.i64 q8, q8, #63
|
||||
@ CHECK: vshr.u8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xff]
|
||||
vshr.u8 d16, d16, #8
|
||||
@ CHECK: vshr.u16 d16, d16, #16 @ encoding: [0x30,0x00,0xd0,0xff]
|
||||
vshr.u16 d16, d16, #16
|
||||
@ CHECK: vshr.u32 d16, d16, #32 @ encoding: [0x30,0x00,0xe0,0xff]
|
||||
vshr.u32 d16, d16, #32
|
||||
@ CHECK: vshr.u64 d16, d16, #64 @ encoding: [0xb0,0x00,0xc0,0xff]
|
||||
vshr.u64 d16, d16, #64
|
||||
@ CHECK: vshr.u8 q8, q8, #8 @ encoding: [0x70,0x00,0xc8,0xff]
|
||||
vshr.u8 q8, q8, #8
|
||||
@ CHECK: vshr.u16 q8, q8, #16 @ encoding: [0x70,0x00,0xd0,0xff]
|
||||
vshr.u16 q8, q8, #16
|
||||
@ CHECK: vshr.u32 q8, q8, #32 @ encoding: [0x70,0x00,0xe0,0xff]
|
||||
vshr.u32 q8, q8, #32
|
||||
@ CHECK: vshr.u64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xff]
|
||||
vshr.u64 q8, q8, #64
|
||||
@ CHECK: vshr.s8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xef]
|
||||
vshr.s8 d16, d16, #8
|
||||
@ CHECK: vshr.s16 d16, d16, #16 @ encoding: [0x30,0x00,0xd0,0xef]
|
||||
vshr.s16 d16, d16, #16
|
||||
@ CHECK: vshr.s32 d16, d16, #32 @ encoding: [0x30,0x00,0xe0,0xef]
|
||||
vshr.s32 d16, d16, #32
|
||||
@ CHECK: vshr.s64 d16, d16, #64 @ encoding: [0xb0,0x00,0xc0,0xef]
|
||||
vshr.s64 d16, d16, #64
|
||||
@ CHECK: vshr.s8 q8, q8, #8 @ encoding: [0x70,0x00,0xc8,0xef]
|
||||
vshr.s8 q8, q8, #8
|
||||
@ CHECK: vshr.s16 q8, q8, #16 @ encoding: [0x70,0x00,0xd0,0xef]
|
||||
vshr.s16 q8, q8, #16
|
||||
@ CHECK: vshr.s32 q8, q8, #32 @ encoding: [0x70,0x00,0xe0,0xef]
|
||||
vshr.s32 q8, q8, #32
|
||||
@ CHECK: vshr.s64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xef]
|
||||
vshr.s64 q8, q8, #64
|
||||
@ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xef]
|
||||
vshll.s8 q8, d16, #7
|
||||
@ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xef]
|
||||
vshll.s16 q8, d16, #15
|
||||
@ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xef]
|
||||
vshll.s32 q8, d16, #31
|
||||
@ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xff]
|
||||
vshll.u8 q8, d16, #7
|
||||
@ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xff]
|
||||
vshll.u16 q8, d16, #15
|
||||
@ CHECK: vshll.u32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xff]
|
||||
vshll.u32 q8, d16, #31
|
||||
@ CHECK: vshll.i8 q8, d16, #8 @ encoding: [0x20,0x03,0xf2,0xff]
|
||||
vshll.i8 q8, d16, #8
|
||||
@ CHECK: vshll.i16 q8, d16, #16 @ encoding: [0x20,0x03,0xf6,0xff]
|
||||
vshll.i16 q8, d16, #16
|
||||
@ CHECK: vshll.i32 q8, d16, #32 @ encoding: [0x20,0x03,0xfa,0xff]
|
||||
vshll.i32 q8, d16, #32
|
||||
@ CHECK: vshrn.i16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xef]
|
||||
vshrn.i16 d16, q8, #8
|
||||
@ CHECK: vshrn.i32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xef]
|
||||
vshrn.i32 d16, q8, #16
|
||||
@ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xef]
|
||||
vshrn.i64 d16, q8, #32
|
||||
@ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xef]
|
||||
vrshl.s8 d16, d17, d16
|
||||
@ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xef]
|
||||
vrshl.s16 d16, d17, d16
|
||||
@ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xef]
|
||||
vrshl.s32 d16, d17, d16
|
||||
@ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0
|
||||
vrshl.s64 d16, d17, d16
|
||||
@ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xff]
|
||||
vrshl.u8 d16, d17, d16
|
||||
@ CHECK: vrshl.u16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xff]
|
||||
vrshl.u16 d16, d17, d16
|
||||
@ CHECK: vrshl.u32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xff]
|
||||
vrshl.u32 d16, d17, d16
|
||||
@ CHECK: vrshl.u64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xff]
|
||||
vrshl.u64 d16, d17, d16
|
||||
@ CHECK: vrshl.s8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xef]
|
||||
vrshl.s8 q8, q9, q8
|
||||
@ CHECK: vrshl.s16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xef]
|
||||
vrshl.s16 q8, q9, q8
|
||||
@ CHECK: vrshl.s32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xef]
|
||||
vrshl.s32 q8, q9, q8
|
||||
@ CHECK: vrshl.s64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xef]
|
||||
vrshl.s64 q8, q9, q8
|
||||
@ CHECK: vrshl.u8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xff]
|
||||
vrshl.u8 q8, q9, q8
|
||||
@ CHECK: vrshl.u16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xff]
|
||||
vrshl.u16 q8, q9, q8
|
||||
@ CHECK: vrshl.u32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xff]
|
||||
vrshl.u32 q8, q9, q8
|
||||
@ CHECK: vrshl.u64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xff]
|
||||
vrshl.u64 q8, q9, q8
|
||||
@ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xef]
|
||||
vrshr.s8 d16, d16, #8
|
||||
@ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xef]
|
||||
vrshr.s16 d16, d16, #16
|
||||
@ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xef]
|
||||
vrshr.s32 d16, d16, #32
|
||||
@ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xef]
|
||||
vrshr.s64 d16, d16, #64
|
||||
@ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xff]
|
||||
vrshr.u8 d16, d16, #8
|
||||
@ CHECK: vrshr.u16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xff]
|
||||
vrshr.u16 d16, d16, #16
|
||||
@ CHECK: vrshr.u32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xff]
|
||||
vrshr.u32 d16, d16, #32
|
||||
@ CHECK: vrshr.u64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xff]
|
||||
vrshr.u64 d16, d16, #64
|
||||
@ CHECK: vrshr.s8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xef]
|
||||
vrshr.s8 q8, q8, #8
|
||||
@ CHECK: vrshr.s16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xef]
|
||||
vrshr.s16 q8, q8, #16
|
||||
@ CHECK: vrshr.s32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xef]
|
||||
vrshr.s32 q8, q8, #32
|
||||
@ CHECK: vrshr.s64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xef]
|
||||
vrshr.s64 q8, q8, #64
|
||||
@ CHECK: vrshr.u8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xff]
|
||||
vrshr.u8 q8, q8, #8
|
||||
@ CHECK: vrshr.u16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xff]
|
||||
vrshr.u16 q8, q8, #16
|
||||
@ CHECK: vrshr.u32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xff]
|
||||
vrshr.u32 q8, q8, #32
|
||||
@ CHECK: vrshr.u64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xff]
|
||||
vrshr.u64 q8, q8, #64
|
||||
@ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xef]
|
||||
vrshrn.i16 d16, q8, #8
|
||||
@ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xef]
|
||||
vrshrn.i32 d16, q8, #16
|
||||
@ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xef]
|
||||
vrshrn.i64 d16, q8, #32
|
100
test/MC/ARM/neont2-shiftaccum-encoding.s
Normal file
100
test/MC/ARM/neont2-shiftaccum-encoding.s
Normal file
@ -0,0 +1,100 @@
|
||||
@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
|
||||
|
||||
.code 16
|
||||
|
||||
@ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xef]
|
||||
vsra.s8 d17, d16, #8
|
||||
@ CHECK: vsra.s16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xef]
|
||||
vsra.s16 d17, d16, #16
|
||||
@ CHECK: vsra.s32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xef]
|
||||
vsra.s32 d17, d16, #32
|
||||
@ CHECK: vsra.s64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xef]
|
||||
vsra.s64 d17, d16, #64
|
||||
@ CHECK: vsra.s8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xef]
|
||||
vsra.s8 q8, q9, #8
|
||||
@ CHECK: vsra.s16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xef]
|
||||
vsra.s16 q8, q9, #16
|
||||
@ CHECK: vsra.s32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xef]
|
||||
vsra.s32 q8, q9, #32
|
||||
@ CHECK: vsra.s64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xef]
|
||||
vsra.s64 q8, q9, #64
|
||||
@ CHECK: vsra.u8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xff]
|
||||
vsra.u8 d17, d16, #8
|
||||
@ CHECK: vsra.u16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xff]
|
||||
vsra.u16 d17, d16, #16
|
||||
@ CHECK: vsra.u32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xff]
|
||||
vsra.u32 d17, d16, #32
|
||||
@ CHECK: vsra.u64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xff]
|
||||
vsra.u64 d17, d16, #64
|
||||
@ CHECK: vsra.u8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xff]
|
||||
vsra.u8 q8, q9, #8
|
||||
@ CHECK: vsra.u16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xff]
|
||||
vsra.u16 q8, q9, #16
|
||||
@ CHECK: vsra.u32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xff]
|
||||
vsra.u32 q8, q9, #32
|
||||
@ CHECK: vsra.u64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xff]
|
||||
vsra.u64 q8, q9, #64
|
||||
@ CHECK: vrsra.s8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xef]
|
||||
vrsra.s8 d17, d16, #8
|
||||
@ CHECK: vrsra.s16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xef]
|
||||
vrsra.s16 d17, d16, #16
|
||||
@ CHECK: vrsra.s32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xef]
|
||||
vrsra.s32 d17, d16, #32
|
||||
@ CHECK: vrsra.s64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xef]
|
||||
vrsra.s64 d17, d16, #64
|
||||
@ CHECK: vrsra.u8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xff]
|
||||
vrsra.u8 d17, d16, #8
|
||||
@ CHECK: vrsra.u16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xff]
|
||||
vrsra.u16 d17, d16, #16
|
||||
@ CHECK: vrsra.u32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xff]
|
||||
vrsra.u32 d17, d16, #32
|
||||
@ CHECK: vrsra.u64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xff]
|
||||
vrsra.u64 d17, d16, #64
|
||||
@ CHECK: vrsra.s8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xef]
|
||||
vrsra.s8 q8, q9, #8
|
||||
@ CHECK: vrsra.s16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xef]
|
||||
vrsra.s16 q8, q9, #16
|
||||
@ CHECK: vrsra.s32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xef]
|
||||
vrsra.s32 q8, q9, #32
|
||||
@ CHECK: vrsra.s64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xef]
|
||||
vrsra.s64 q8, q9, #64
|
||||
@ CHECK: vrsra.u8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xff]
|
||||
vrsra.u8 q8, q9, #8
|
||||
@ CHECK: vrsra.u16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xff]
|
||||
vrsra.u16 q8, q9, #16
|
||||
@ CHECK: vrsra.u32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xff]
|
||||
vrsra.u32 q8, q9, #32
|
||||
@ CHECK: vrsra.u64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xff]
|
||||
vrsra.u64 q8, q9, #64
|
||||
@ CHECK: vsli.8 d17, d16, #7 @ encoding: [0x30,0x15,0xcf,0xff]
|
||||
vsli.8 d17, d16, #7
|
||||
@ CHECK: vsli.16 d17, d16, #15 @ encoding: [0x30,0x15,0xdf,0xff]
|
||||
vsli.16 d17, d16, #15
|
||||
@ CHECK: vsli.32 d17, d16, #31 @ encoding: [0x30,0x15,0xff,0xff]
|
||||
vsli.32 d17, d16, #31
|
||||
@ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xb0,0x15,0xff,0xff]
|
||||
vsli.64 d17, d16, #63
|
||||
@ CHECK: vsli.8 q9, q8, #7 @ encoding: [0x70,0x25,0xcf,0xff]
|
||||
vsli.8 q9, q8, #7
|
||||
@ CHECK: vsli.16 q9, q8, #15 @ encoding: [0x70,0x25,0xdf,0xff]
|
||||
vsli.16 q9, q8, #15
|
||||
@ CHECK: vsli.32 q9, q8, #31 @ encoding: [0x70,0x25,0xff,0xff]
|
||||
vsli.32 q9, q8, #31
|
||||
@ CHECK: vsli.64 q9, q8, #63 @ encoding: [0xf0,0x25,0xff,0xff]
|
||||
vsli.64 q9, q8, #63
|
||||
@ CHECK: vsri.8 d17, d16, #8 @ encoding: [0x30,0x14,0xc8,0xff]
|
||||
vsri.8 d17, d16, #8
|
||||
@ CHECK: vsri.16 d17, d16, #16 @ encoding: [0x30,0x14,0xd0,0xff]
|
||||
vsri.16 d17, d16, #16
|
||||
@ CHECK: vsri.32 d17, d16, #32 @ encoding: [0x30,0x14,0xe0,0xff]
|
||||
vsri.32 d17, d16, #32
|
||||
@ CHECK: vsri.64 d17, d16, #64 @ encoding: [0xb0,0x14,0xc0,0xff]
|
||||
vsri.64 d17, d16, #64
|
||||
@ CHECK: vsri.8 q9, q8, #8 @ encoding: [0x70,0x24,0xc8,0xff]
|
||||
vsri.8 q9, q8, #8
|
||||
@ CHECK: vsri.16 q9, q8, #16 @ encoding: [0x70,0x24,0xd0,0xff]
|
||||
vsri.16 q9, q8, #16
|
||||
@ CHECK: vsri.32 q9, q8, #32 @ encoding: [0x70,0x24,0xe0,0xff]
|
||||
vsri.32 q9, q8, #32
|
||||
@ CHECK: vsri.64 q9, q8, #64 @ encoding: [0xf0,0x24,0xc0,0xff]
|
||||
vsri.64 q9, q8, #64
|
48
test/MC/ARM/neont2-shuffle-encoding.s
Normal file
48
test/MC/ARM/neont2-shuffle-encoding.s
Normal file
@ -0,0 +1,48 @@
|
||||
@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
|
||||
|
||||
.code 16
|
||||
|
||||
@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xa0,0x03,0xf1,0xef]
|
||||
vext.8 d16, d17, d16, #3
|
||||
@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xa0,0x05,0xf1,0xef]
|
||||
vext.8 d16, d17, d16, #5
|
||||
@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xe0,0x03,0xf2,0xef]
|
||||
vext.8 q8, q9, q8, #3
|
||||
@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xe0,0x07,0xf2,0xef]
|
||||
vext.8 q8, q9, q8, #7
|
||||
@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xa0,0x06,0xf1,0xef]
|
||||
vext.16 d16, d17, d16, #3
|
||||
@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xe0,0x0c,0xf2,0xef]
|
||||
vext.32 q8, q9, q8, #3
|
||||
@ CHECK: vtrn.8 d17, d16 @ encoding: [0xa0,0x10,0xf2,0xff]
|
||||
vtrn.8 d17, d16
|
||||
@ CHECK: vtrn.16 d17, d16 @ encoding: [0xa0,0x10,0xf6,0xff]
|
||||
vtrn.16 d17, d16
|
||||
@ CHECK: vtrn.32 d17, d16 @ encoding: [0xa0,0x10,0xfa,0xff]
|
||||
vtrn.32 d17, d16
|
||||
@ CHECK: vtrn.8 q9, q8 @ encoding: [0xe0,0x20,0xf2,0xff]
|
||||
vtrn.8 q9, q8
|
||||
@ CHECK: vtrn.16 q9, q8 @ encoding: [0xe0,0x20,0xf6,0xff]
|
||||
vtrn.16 q9, q8
|
||||
@ CHECK: vtrn.32 q9, q8 @ encoding: [0xe0,0x20,0xfa,0xff]
|
||||
vtrn.32 q9, q8
|
||||
@ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xff]
|
||||
vuzp.8 d17, d16
|
||||
@ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xff]
|
||||
vuzp.16 d17, d16
|
||||
@ CHECK: vuzp.8 q9, q8 @ encoding: [0x60,0x21,0xf2,0xff]
|
||||
vuzp.8 q9, q8
|
||||
@ CHECK: vuzp.16 q9, q8 @ encoding: [0x60,0x21,0xf6,0xff]
|
||||
vuzp.16 q9, q8
|
||||
@ CHECK: vuzp.32 q9, q8 @ encoding: [0x60,0x21,0xfa,0xff]
|
||||
vuzp.32 q9, q8
|
||||
@ CHECK: vzip.8 d17, d16 @ encoding: [0xa0,0x11,0xf2,0xff]
|
||||
vzip.8 d17, d16
|
||||
@ CHECK: vzip.16 d17, d16 @ encoding: [0xa0,0x11,0xf6,0xff]
|
||||
vzip.16 d17, d16
|
||||
@ CHECK: vzip.8 q9, q8 @ encoding: [0xe0,0x21,0xf2,0xff]
|
||||
vzip.8 q9, q8
|
||||
@ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xff]
|
||||
vzip.16 q9, q8
|
||||
@ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xff]
|
||||
vzip.32 q9, q8
|
46
test/MC/ARM/neont2-sub-encoding.s
Normal file
46
test/MC/ARM/neont2-sub-encoding.s
Normal file
@ -0,0 +1,46 @@
|
||||
@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
|
||||
|
||||
@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xa0,0x03,0xf1,0xef]
|
||||
vext.8 d16, d17, d16, #3
|
||||
@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xa0,0x05,0xf1,0xef]
|
||||
vext.8 d16, d17, d16, #5
|
||||
@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xe0,0x03,0xf2,0xef]
|
||||
vext.8 q8, q9, q8, #3
|
||||
@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xe0,0x07,0xf2,0xef]
|
||||
vext.8 q8, q9, q8, #7
|
||||
@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xa0,0x06,0xf1,0xef]
|
||||
vext.16 d16, d17, d16, #3
|
||||
@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xe0,0x0c,0xf2,0xef]
|
||||
vext.32 q8, q9, q8, #3
|
||||
@ CHECK: vtrn.8 d17, d16 @ encoding: [0xa0,0x10,0xf2,0xff]
|
||||
vtrn.8 d17, d16
|
||||
@ CHECK: vtrn.16 d17, d16 @ encoding: [0xa0,0x10,0xf6,0xff]
|
||||
vtrn.16 d17, d16
|
||||
@ CHECK: vtrn.32 d17, d16 @ encoding: [0xa0,0x10,0xfa,0xff]
|
||||
vtrn.32 d17, d16
|
||||
@ CHECK: vtrn.8 q9, q8 @ encoding: [0xe0,0x20,0xf2,0xff]
|
||||
vtrn.8 q9, q8
|
||||
@ CHECK: vtrn.16 q9, q8 @ encoding: [0xe0,0x20,0xf6,0xff]
|
||||
vtrn.16 q9, q8
|
||||
@ CHECK: vtrn.32 q9, q8 @ encoding: [0xe0,0x20,0xfa,0xff]
|
||||
vtrn.32 q9, q8
|
||||
@ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xff]
|
||||
vuzp.8 d17, d16
|
||||
@ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xff]
|
||||
vuzp.16 d17, d16
|
||||
@ CHECK: vuzp.8 q9, q8 @ encoding: [0x60,0x21,0xf2,0xff]
|
||||
vuzp.8 q9, q8
|
||||
@ CHECK: vuzp.16 q9, q8 @ encoding: [0x60,0x21,0xf6,0xff]
|
||||
vuzp.16 q9, q8
|
||||
@ CHECK: vuzp.32 q9, q8 @ encoding: [0x60,0x21,0xfa,0xff]
|
||||
vuzp.32 q9, q8
|
||||
@ CHECK: vzip.8 d17, d16 @ encoding: [0xa0,0x11,0xf2,0xff]
|
||||
vzip.8 d17, d16
|
||||
@ CHECK: vzip.16 d17, d16 @ encoding: [0xa0,0x11,0xf6,0xff]
|
||||
vzip.16 d17, d16
|
||||
@ CHECK: vzip.8 q9, q8 @ encoding: [0xe0,0x21,0xf2,0xff]
|
||||
vzip.8 q9, q8
|
||||
@ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xff]
|
||||
vzip.16 q9, q8
|
||||
@ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xff]
|
||||
vzip.32 q9, q8
|
Loading…
Reference in New Issue
Block a user