From 414e5023f8f8b22486313e2867fdb39c7c4f564b Mon Sep 17 00:00:00 2001
From: Jakob Stoklund Olesen <stoklund@2pi.dk>
Date: Tue, 14 Dec 2010 18:53:39 +0000
Subject: [PATCH] Add TargetRegisterInfo::printReg() to pretty-print registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121780 91177308-0d34-0410-b5e6-96231b3b80d8
---
 include/llvm/Target/TargetRegisterInfo.h | 4 ++++
 lib/Target/TargetRegisterInfo.cpp        | 8 ++++++++
 2 files changed, 12 insertions(+)

diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h
index 9caedcb5064..5af90fbf8cd 100644
--- a/include/llvm/Target/TargetRegisterInfo.h
+++ b/include/llvm/Target/TargetRegisterInfo.h
@@ -29,6 +29,7 @@ class MachineFunction;
 class MachineMove;
 class RegScavenger;
 template<class T> class SmallVectorImpl;
+class raw_ostream;
 
 /// TargetRegisterDesc - This record contains all of the information known about
 /// a particular register.  The AliasSet field (if not null) contains a pointer
@@ -321,6 +322,9 @@ public:
     return Reg >= FirstVirtualRegister;
   }
 
+  /// printReg - Print a virtual or physical register on OS.
+  void printReg(unsigned Reg, raw_ostream &OS) const;
+
   /// getMinimalPhysRegClass - Returns the Register Class of a physical
   /// register of the given type, picking the most sub register class of
   /// the right type that contains this physreg.
diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp
index 3beddf5fc77..078320d42f2 100644
--- a/lib/Target/TargetRegisterInfo.cpp
+++ b/lib/Target/TargetRegisterInfo.cpp
@@ -17,6 +17,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/ADT/BitVector.h"
+#include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 
@@ -39,6 +40,13 @@ TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
 
 TargetRegisterInfo::~TargetRegisterInfo() {}
 
+void TargetRegisterInfo::printReg(unsigned Reg, raw_ostream &OS) const {
+  if (Reg && isVirtualRegister(Reg))
+    OS << "%reg" << Reg;
+  else
+    OS << '%' << getName(Reg);
+}
+
 /// getMinimalPhysRegClass - Returns the Register Class of a physical
 /// register of the given type, picking the most sub register class of
 /// the right type that contains this physreg.