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Print some new nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21001 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -924,7 +924,9 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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default:
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default:
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// FIXME: MEMOIZE!!
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// FIXME: MEMOIZE!!
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SDNode *N = new SDNode(Opcode, Children);
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SDNode *N = new SDNode(Opcode, Children);
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if (Opcode != ISD::ADD_PARTS && Opcode != ISD::SUB_PARTS) {
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if (Opcode != ISD::ADD_PARTS && Opcode != ISD::SUB_PARTS &&
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Opcode != ISD::SRA_PARTS && Opcode != ISD::SRL_PARTS &&
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Opcode != ISD::SHL_PARTS) {
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N->setValueTypes(VT);
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N->setValueTypes(VT);
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} else {
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} else {
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std::vector<MVT::ValueType> V(N->getNumOperands()/2, VT);
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std::vector<MVT::ValueType> V(N->getNumOperands()/2, VT);
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@ -1131,6 +1133,9 @@ const char *SDNode::getOperationName() const {
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case ISD::SELECT: return "select";
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case ISD::SELECT: return "select";
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case ISD::ADD_PARTS: return "add_parts";
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case ISD::ADD_PARTS: return "add_parts";
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case ISD::SUB_PARTS: return "sub_parts";
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case ISD::SUB_PARTS: return "sub_parts";
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case ISD::SHL_PARTS: return "shl_parts";
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case ISD::SRA_PARTS: return "sra_parts";
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case ISD::SRL_PARTS: return "srl_parts";
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// Conversion operators.
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// Conversion operators.
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case ISD::SIGN_EXTEND: return "sign_extend";
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case ISD::SIGN_EXTEND: return "sign_extend";
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