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"This adds a getName() method to TargetRegisterClass, just like in TargetRegisterInfo.

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This makes debugging register classes a bit easier."

Patch by Jakob Stoklund Olesen!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68400 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-04-03 20:25:41 +00:00
parent 03dc1fe9ac
commit 41c90738e9
2 changed files with 9 additions and 2 deletions
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10
include/llvm/Target/TargetRegisterInfo.h
View File

@ -56,6 +56,7 @@ public:
typedef const TargetRegisterClass* const * sc_iterator; typedef const TargetRegisterClass* const * sc_iterator;
private: private:
unsigned ID; unsigned ID;
const char *Name;
bool isSubClass; bool isSubClass;
const vt_iterator VTs; const vt_iterator VTs;
const sc_iterator SubClasses; const sc_iterator SubClasses;
@ -65,19 +66,24 @@ private:
const iterator RegsBegin, RegsEnd; const iterator RegsBegin, RegsEnd;
public: public:
TargetRegisterClass(unsigned id, TargetRegisterClass(unsigned id,
const char *name,
const MVT *vts, const MVT *vts,
const TargetRegisterClass * const *subcs, const TargetRegisterClass * const *subcs,
const TargetRegisterClass * const *supcs, const TargetRegisterClass * const *supcs,
unsigned RS, unsigned Al, int CC, unsigned RS, unsigned Al, int CC,
iterator RB, iterator RE) iterator RB, iterator RE)
: ID(id), VTs(vts), SubClasses(subcs), SuperClasses(supcs), : ID(id), Name(name), VTs(vts), SubClasses(subcs), SuperClasses(supcs),
RegSize(RS), Alignment(Al), CopyCost(CC), RegsBegin(RB), RegsEnd(RE) {} RegSize(RS), Alignment(Al), CopyCost(CC), RegsBegin(RB), RegsEnd(RE) {}
virtual ~TargetRegisterClass() {} // Allow subclasses virtual ~TargetRegisterClass() {} // Allow subclasses
/// getID() - Return the register class ID number. /// getID() - Return the register class ID number.
/// ///
unsigned getID() const { return ID; } unsigned getID() const { return ID; }
/// getName() - Return the register class name for debugging.
///
const char *getName() const { return Name; }
/// begin/end - Return all of the registers in this class. /// begin/end - Return all of the registers in this class.
/// ///
iterator begin() const { return RegsBegin; } iterator begin() const { return RegsBegin; }

1
utils/TableGen/RegisterInfoEmitter.cpp
View File

@ -319,6 +319,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
OS << RC.getName() << "Class::" << RC.getName() OS << RC.getName() << "Class::" << RC.getName()
<< "Class() : TargetRegisterClass(" << "Class() : TargetRegisterClass("
<< RC.getName() + "RegClassID" << ", " << RC.getName() + "RegClassID" << ", "
<< '\"' << RC.getName() << "\", "
<< RC.getName() + "VTs" << ", " << RC.getName() + "VTs" << ", "
<< RC.getName() + "Subclasses" << ", " << RC.getName() + "Subclasses" << ", "
<< RC.getName() + "Superclasses" << ", " << RC.getName() + "Superclasses" << ", "