6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-01 00:33:09 +00:00
Code Issues Projects Releases Wiki Activity

-enable-arm-if-conversion is gone.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42169 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-09-20 18:03:23 +00:00
parent 4bf6ac5f40
commit 4226689f44
8 changed files with 23 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
test/CodeGen/ARM/ifcvt1.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | count 1
; RUN: llvm-as < %s | llc -march=arm
; RUN: llvm-as < %s | llc -march=arm | grep bx | count 1
define i32 @t1(i32 %a, i32 %b) {
%tmp2 = icmp eq i32 %a, 0

8
test/CodeGen/ARM/ifcvt2.ll
View File

@ -1,7 +1,7 @@
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxlt | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxgt | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxge | count 1
; RUN: llvm-as < %s | llc -march=arm
; RUN: llvm-as < %s | llc -march=arm | grep bxlt | count 1
; RUN: llvm-as < %s | llc -march=arm | grep bxgt | count 1
; RUN: llvm-as < %s | llc -march=arm | grep bxge | count 1
define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
%tmp2 = icmp sgt i32 %c, 10

6
test/CodeGen/ARM/ifcvt3.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep cmpne | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | count 2
; RUN: llvm-as < %s | llc -march=arm
; RUN: llvm-as < %s | llc -march=arm | grep cmpne | count 1
; RUN: llvm-as < %s | llc -march=arm | grep bx | count 2
define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
switch i32 %c, label %cond_next [

6
test/CodeGen/ARM/ifcvt4.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep subgt | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep suble | count 1
; RUN: llvm-as < %s | llc -march=arm
; RUN: llvm-as < %s | llc -march=arm | grep subgt | count 1
; RUN: llvm-as < %s | llc -march=arm | grep suble | count 1
; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt.
define i32 @t(i32 %a, i32 %b) {

4
test/CodeGen/ARM/ifcvt5.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep blge | count 1
; RUN: llvm-as < %s | llc -march=arm
; RUN: llvm-as < %s | llc -march=arm | grep blge | count 1
@x = external global i32* ; <i32**> [#uses=1]

6
test/CodeGen/ARM/ifcvt6.ll
View File

@ -1,10 +1,10 @@
; RUN: llvm-as < %s | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion
; RUN: llc -march=arm -mtriple=arm-apple-darwin
; RUN: llvm-as < %s | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin | \
; RUN: grep cmpne | count 1
; RUN: llvm-as < %s | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin | \
; RUN: grep ldmhi | count 1
define void @foo(i32 %X, i32 %Y) {

8
test/CodeGen/ARM/ifcvt7.ll
View File

@ -1,13 +1,13 @@
; RUN: llvm-as < %s | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion
; RUN: llc -march=arm -mtriple=arm-apple-darwin
; RUN: llvm-as < %s | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin | \
; RUN: grep cmpeq | count 1
; RUN: llvm-as < %s | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin | \
; RUN: grep moveq | count 1
; RUN: llvm-as < %s | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin | \
; RUN: grep ldmeq | count 1
; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1.

4
test/CodeGen/ARM/ifcvt8.ll
View File

@ -1,7 +1,7 @@
; RUN: llvm-as < %s | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion
; RUN: llc -march=arm -mtriple=arm-apple-darwin
; RUN: llvm-as < %s | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
; RUN: llc -march=arm -mtriple=arm-apple-darwin | \
; RUN: grep ldmne | count 1
%struct.SString = type { i8*, i32, i32 }