From 425a96971f0b0298222a51b5692aacaa9229dce3 Mon Sep 17 00:00:00 2001 From: Nate Begeman Date: Tue, 29 Nov 2005 08:17:20 +0000 Subject: [PATCH] Hook up one type, v4f32, to the VR RegisterClass for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24517 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCISelLowering.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 9526ae1f2a7..1ef1d3e9d0e 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -121,6 +121,12 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM) setOperationAction(ISD::SRA, MVT::i64, Custom); } + if (TM.getSubtarget().hasAltivec()) { + // FIXME: AltiVec supports a wide variety of packed types. For now, we're + // bringing up support with just v4f32. + addRegisterClass(MVT::v4f32, PPC::VRRCRegisterClass); + } + setSetCCResultContents(ZeroOrOneSetCCResult); computeRegisterProperties();