6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-09-16 14:26:17 +00:00
Code Issues Projects Releases Wiki Activity

Added -misched-regpressure option.

Browse Source 
Register pressure tracking is half the complexity of the
scheduler. It's useful to be able to turn it off for compile time and
performance comparisons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189987 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2013-09-04 20:59:59 +00:00
parent b4b7a52ec5
commit 42ebb3ad41
4 changed files with 57 additions and 23 deletions
Download Patch File Download Diff File Expand all files Collapse all files

44
lib/CodeGen/MachineScheduler.cpp
View File

@@ -53,6 +53,9 @@ static cl::opt<unsigned> MISchedCutoff("misched-cutoff", cl::Hidden,
static bool ViewMISchedDAGs = false;
#endif // NDEBUG
static cl::opt<bool> EnableRegPressure("misched-regpressure", cl::Hidden,
cl::desc("Enable register pressure scheduling."), cl::init(true));
static cl::opt<bool> EnableCyclicPath("misched-cyclicpath", cl::Hidden,
cl::desc("Enable cyclic critical path analysis."), cl::init(false));
@@ -477,6 +480,8 @@ void ScheduleDAGMI::enterRegion(MachineBasicBlock *bb,
{
ScheduleDAGInstrs::enterRegion(bb, begin, end, regioninstrs);
ShouldTrackPressure = EnableRegPressure;
// For convenience remember the end of the liveness region.
LiveRegionEnd =
(RegionEnd == bb->end()) ? RegionEnd : llvm::next(RegionEnd);
@@ -657,6 +662,13 @@ void ScheduleDAGMI::schedule() {
/// Build the DAG and setup three register pressure trackers.
void ScheduleDAGMI::buildDAGWithRegPressure() {
if (!ShouldTrackPressure) {
RPTracker.reset();
RegionCriticalPSets.clear();
buildSchedGraph(AA);
return;
}
// Initialize the register pressure tracker used by buildSchedGraph.
RPTracker.init(&MF, RegClassInfo, LIS, BB, LiveRegionEnd,
/*TrackUntiedDefs=*/true);
@@ -820,11 +832,13 @@ void ScheduleDAGMI::initQueues(ArrayRef<SUnit*> TopRoots,
SchedImpl->registerRoots();
// Advance past initial DebugValues.
assert(TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker");
CurrentTop = nextIfDebug(RegionBegin, RegionEnd);
TopRPTracker.setPos(CurrentTop);
CurrentBottom = RegionEnd;
if (ShouldTrackPressure) {
assert(TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker");
TopRPTracker.setPos(CurrentTop);
}
}
/// Move an instruction and update register pressure.
@@ -841,10 +855,12 @@ void ScheduleDAGMI::scheduleMI(SUnit *SU, bool IsTopNode) {
TopRPTracker.setPos(MI);
}
// Update top scheduled pressure.
TopRPTracker.advance();
assert(TopRPTracker.getPos() == CurrentTop && "out of sync");
updateScheduledPressure(TopRPTracker.getPressure().MaxSetPressure);
if (ShouldTrackPressure) {
// Update top scheduled pressure.
TopRPTracker.advance();
assert(TopRPTracker.getPos() == CurrentTop && "out of sync");
updateScheduledPressure(TopRPTracker.getPressure().MaxSetPressure);
}
}
else {
assert(SU->isBottomReady() && "node still has unscheduled dependencies");
@@ -860,12 +876,14 @@ void ScheduleDAGMI::scheduleMI(SUnit *SU, bool IsTopNode) {
moveInstruction(MI, CurrentBottom);
CurrentBottom = MI;
}
// Update bottom scheduled pressure.
SmallVector<unsigned, 8> LiveUses;
BotRPTracker.recede(&LiveUses);
assert(BotRPTracker.getPos() == CurrentBottom && "out of sync");
updatePressureDiffs(LiveUses);
updateScheduledPressure(BotRPTracker.getPressure().MaxSetPressure);
if (ShouldTrackPressure) {
// Update bottom scheduled pressure.
SmallVector<unsigned, 8> LiveUses;
BotRPTracker.recede(&LiveUses);
assert(BotRPTracker.getPos() == CurrentBottom && "out of sync");
updatePressureDiffs(LiveUses);
updateScheduledPressure(BotRPTracker.getPressure().MaxSetPressure);
}
}
}