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Add an MF argument to MachineInstr::addOperand().

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Just like for addMemOperand(), the function pointer provides a context
for allocating memory. This will make it possible to use a better memory
allocation strategy for the MI operand list, which is currently a slow
std::vector.

Most calls to addOperand() come from MachineInstrBuilder, so give that
class an MF reference as well. Code using BuildMI() won't need changing
at all since the MF reference is already required to allocate a
MachineInstr.

Future patches will fix code that calls MI::addOperand(Op) directly, as
well as code that uses the now deprecated MachineInstrBuilder(MI)
constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170574 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2012-12-19 19:19:01 +00:00
parent e7ff165a40
commit 433cb080ba
2 changed files with 29 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
include/llvm/CodeGen/MachineInstr.h
View File

@@ -952,6 +952,14 @@ public:
/// (before the first implicit operand). /// (before the first implicit operand).
void addOperand(const MachineOperand &Op); void addOperand(const MachineOperand &Op);
// Add an operand while providing a context pointer. This will replace the
// single-argument function shortly.
//
// MF must be the machine function that was used to allocate this instruction.
void addOperand(MachineFunction &MF, const MachineOperand &Op) {
addOperand(Op);
}
/// setDesc - Replace the instruction descriptor (thus opcode) of /// setDesc - Replace the instruction descriptor (thus opcode) of
/// the current instruction with a new one. /// the current instruction with a new one.
/// ///

33
include/llvm/CodeGen/MachineInstrBuilder.h
View File

@@ -42,10 +42,15 @@ namespace RegState {
} }
class MachineInstrBuilder { class MachineInstrBuilder {
MachineFunction *MF;
MachineInstr *MI; MachineInstr *MI;
public: public:
MachineInstrBuilder() : MI(0) {} MachineInstrBuilder() : MF(0), MI(0) {}
explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {} explicit MachineInstrBuilder(MachineInstr *mi) : MF(0), MI(mi) {}
/// Create a MachineInstrBuilder for manipulating an existing instruction.
/// F must be the machine function that was used to allocate I.
MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {}
/// Allow automatic conversion to the machine instruction we are working on. /// Allow automatic conversion to the machine instruction we are working on.
/// ///
@@ -204,7 +209,7 @@ public:
inline MachineInstrBuilder BuildMI(MachineFunction &MF, inline MachineInstrBuilder BuildMI(MachineFunction &MF,
DebugLoc DL, DebugLoc DL,
const MCInstrDesc &MCID) { const MCInstrDesc &MCID) {
return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL)); return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL));
} }
/// BuildMI - This version of the builder sets up the first operand as a /// BuildMI - This version of the builder sets up the first operand as a
@@ -214,7 +219,7 @@ inline MachineInstrBuilder BuildMI(MachineFunction &MF,
DebugLoc DL, DebugLoc DL,
const MCInstrDesc &MCID, const MCInstrDesc &MCID,
unsigned DestReg) { unsigned DestReg) {
return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL)) return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL))
.addReg(DestReg, RegState::Define); .addReg(DestReg, RegState::Define);
} }
@@ -227,9 +232,10 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
DebugLoc DL, DebugLoc DL,
const MCInstrDesc &MCID, const MCInstrDesc &MCID,
unsigned DestReg) { unsigned DestReg) {
MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); MachineFunction &MF = *BB.getParent();
MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
BB.insert(I, MI); BB.insert(I, MI);
return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define); return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
} }
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
@@ -237,9 +243,10 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
DebugLoc DL, DebugLoc DL,
const MCInstrDesc &MCID, const MCInstrDesc &MCID,
unsigned DestReg) { unsigned DestReg) {
MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); MachineFunction &MF = *BB.getParent();
MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
BB.insert(I, MI); BB.insert(I, MI);
return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define); return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
} }
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
@@ -264,18 +271,20 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I, MachineBasicBlock::iterator I,
DebugLoc DL, DebugLoc DL,
const MCInstrDesc &MCID) { const MCInstrDesc &MCID) {
MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); MachineFunction &MF = *BB.getParent();
MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
BB.insert(I, MI); BB.insert(I, MI);
return MachineInstrBuilder(MI); return MachineInstrBuilder(MF, MI);
} }
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::instr_iterator I, MachineBasicBlock::instr_iterator I,
DebugLoc DL, DebugLoc DL,
const MCInstrDesc &MCID) { const MCInstrDesc &MCID) {
MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); MachineFunction &MF = *BB.getParent();
MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
BB.insert(I, MI); BB.insert(I, MI);
return MachineInstrBuilder(MI); return MachineInstrBuilder(MF, MI);
} }
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,