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Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks
The issue is caused when Post-RA scheduler reorders a bundle instruction (IT block). However, it only flips the CPSR liveness of the bundle instruction, leaves the instructions inside the bundle unchanged, which causes inconstancy and crashes Thumb2SizeReduction.cpp::ReduceMBB(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199127 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -980,6 +980,9 @@ bool Thumb2SizeReduce::ReduceMBB(MachineBasicBlock &MBB) {
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MachineOperand *MO = BundleMI->findRegisterDefOperand(ARM::CPSR);
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if (MO && !MO->isDead())
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LiveCPSR = true;
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MO = BundleMI->findRegisterUseOperand(ARM::CPSR);
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if (MO && !MO->isKill())
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LiveCPSR = true;
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}
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bool DefCPSR = false;
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@ -1,4 +1,5 @@
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8
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; RUN: llc < %s -mtriple=thumbv8-none-linux-gnueabi | FileCheck %s
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%struct.LIST_NODE.0.16 = type { %struct.LIST_NODE.0.16*, i8* }
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@ -26,3 +27,24 @@ bb3: ; preds = %bb2, %entry
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bb5: ; preds = %bb3, %bb
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ret %struct.LIST_NODE.0.16* null
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}
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declare void @use(i32)
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define double @find_max_double(i32 %n, double* nocapture readonly %aa) {
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entry:
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;CHECK-LABEL: find_max_double:
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br i1 undef, label %for.body, label %for.end
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for.body: ; preds = %for.body, %entry
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%0 = load double* null, align 8
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%cmp2.6 = fcmp ogt double %0, 0.000000e+00
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%idx.1.6 = select i1 %cmp2.6, i32 undef, i32 0
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%idx.1.7 = select i1 undef, i32 undef, i32 %idx.1.6
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%max.1.7 = select i1 undef, double 0.000000e+00, double undef
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br i1 undef, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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%max.0.lcssa = phi double [ undef, %entry ], [ %max.1.7, %for.body ]
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%idx.0.lcssa = phi i32 [ 0, %entry ], [ %idx.1.7, %for.body ]
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tail call void @use(i32 %idx.0.lcssa)
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ret double %max.0.lcssa
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}
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