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Make assembly parser method names more consistent.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135950 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-07-25 20:14:50 +00:00
parent 7331ac47b9
commit 43904299b0
3 changed files with 28 additions and 28 deletions
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6
lib/Target/ARM/ARMInstrFormats.td
View File

@ -144,19 +144,19 @@ def CCOutOperand : AsmOperandClass {
def MemBarrierOptOperand : AsmOperandClass { def MemBarrierOptOperand : AsmOperandClass {
let Name = "MemBarrierOpt"; let Name = "MemBarrierOpt";
let SuperClasses = []; let SuperClasses = [];
let ParserMethod = "tryParseMemBarrierOptOperand"; let ParserMethod = "parseMemBarrierOptOperand";
} }
def ProcIFlagsOperand : AsmOperandClass { def ProcIFlagsOperand : AsmOperandClass {
let Name = "ProcIFlags"; let Name = "ProcIFlags";
let SuperClasses = []; let SuperClasses = [];
let ParserMethod = "tryParseProcIFlagsOperand"; let ParserMethod = "parseProcIFlagsOperand";
} }
def MSRMaskOperand : AsmOperandClass { def MSRMaskOperand : AsmOperandClass {
let Name = "MSRMask"; let Name = "MSRMask";
let SuperClasses = []; let SuperClasses = [];
let ParserMethod = "tryParseMSRMaskOperand"; let ParserMethod = "parseMSRMaskOperand";
} }
// ARM imod and iflag operands, used only by the CPS instruction. // ARM imod and iflag operands, used only by the CPS instruction.

8
lib/Target/ARM/ARMInstrInfo.td
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@ -570,7 +570,7 @@ def ldst_so_reg : Operand<i32>,
// //
def MemMode2AsmOperand : AsmOperandClass { def MemMode2AsmOperand : AsmOperandClass {
let Name = "MemMode2"; let Name = "MemMode2";
let ParserMethod = "tryParseMemMode2Operand"; let ParserMethod = "parseMemMode2Operand";
} }
def addrmode2 : Operand<i32>, def addrmode2 : Operand<i32>,
ComplexPattern<i32, 3, "SelectAddrMode2", []> { ComplexPattern<i32, 3, "SelectAddrMode2", []> {
@ -593,7 +593,7 @@ def am2offset : Operand<i32>,
// //
def MemMode3AsmOperand : AsmOperandClass { def MemMode3AsmOperand : AsmOperandClass {
let Name = "MemMode3"; let Name = "MemMode3";
let ParserMethod = "tryParseMemMode3Operand"; let ParserMethod = "parseMemMode3Operand";
} }
def addrmode3 : Operand<i32>, def addrmode3 : Operand<i32>,
ComplexPattern<i32, 3, "SelectAddrMode3", []> { ComplexPattern<i32, 3, "SelectAddrMode3", []> {
@ -689,7 +689,7 @@ def nohash_imm : Operand<i32> {
def CoprocNumAsmOperand : AsmOperandClass { def CoprocNumAsmOperand : AsmOperandClass {
let Name = "CoprocNum"; let Name = "CoprocNum";
let ParserMethod = "tryParseCoprocNumOperand"; let ParserMethod = "parseCoprocNumOperand";
} }
def p_imm : Operand<i32> { def p_imm : Operand<i32> {
let PrintMethod = "printPImmediate"; let PrintMethod = "printPImmediate";
@ -698,7 +698,7 @@ def p_imm : Operand<i32> {
def CoprocRegAsmOperand : AsmOperandClass { def CoprocRegAsmOperand : AsmOperandClass {
let Name = "CoprocReg"; let Name = "CoprocReg";
let ParserMethod = "tryParseCoprocRegOperand"; let ParserMethod = "parseCoprocRegOperand";
} }
def c_imm : Operand<i32> { def c_imm : Operand<i32> {
let PrintMethod = "printCImmediate"; let PrintMethod = "printCImmediate";

42
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -104,19 +104,19 @@ class ARMAsmParser : public TargetAsmParser {
/// } /// }
OperandMatchResultTy tryParseCoprocNumOperand( OperandMatchResultTy parseCoprocNumOperand(
SmallVectorImpl<MCParsedAsmOperand*>&); SmallVectorImpl<MCParsedAsmOperand*>&);
OperandMatchResultTy tryParseCoprocRegOperand( OperandMatchResultTy parseCoprocRegOperand(
SmallVectorImpl<MCParsedAsmOperand*>&); SmallVectorImpl<MCParsedAsmOperand*>&);
OperandMatchResultTy tryParseMemBarrierOptOperand( OperandMatchResultTy parseMemBarrierOptOperand(
SmallVectorImpl<MCParsedAsmOperand*>&); SmallVectorImpl<MCParsedAsmOperand*>&);
OperandMatchResultTy tryParseProcIFlagsOperand( OperandMatchResultTy parseProcIFlagsOperand(
SmallVectorImpl<MCParsedAsmOperand*>&); SmallVectorImpl<MCParsedAsmOperand*>&);
OperandMatchResultTy tryParseMSRMaskOperand( OperandMatchResultTy parseMSRMaskOperand(
SmallVectorImpl<MCParsedAsmOperand*>&); SmallVectorImpl<MCParsedAsmOperand*>&);
OperandMatchResultTy tryParseMemMode2Operand( OperandMatchResultTy parseMemMode2Operand(
SmallVectorImpl<MCParsedAsmOperand*>&); SmallVectorImpl<MCParsedAsmOperand*>&);
OperandMatchResultTy tryParseMemMode3Operand( OperandMatchResultTy parseMemMode3Operand(
SmallVectorImpl<MCParsedAsmOperand*>&); SmallVectorImpl<MCParsedAsmOperand*>&);
OperandMatchResultTy parsePKHImm(SmallVectorImpl<MCParsedAsmOperand*> &O, OperandMatchResultTy parsePKHImm(SmallVectorImpl<MCParsedAsmOperand*> &O,
StringRef Op, int Low, int High); StringRef Op, int Low, int High);
@ -1360,11 +1360,11 @@ static int MatchCoprocessorOperandName(StringRef Name, char CoprocOp) {
return -1; return -1;
} }
/// tryParseCoprocNumOperand - Try to parse an coprocessor number operand. The /// parseCoprocNumOperand - Try to parse an coprocessor number operand. The
/// token must be an Identifier when called, and if it is a coprocessor /// token must be an Identifier when called, and if it is a coprocessor
/// number, the token is eaten and the operand is added to the operand list. /// number, the token is eaten and the operand is added to the operand list.
ARMAsmParser::OperandMatchResultTy ARMAsmParser:: ARMAsmParser::OperandMatchResultTy ARMAsmParser::
tryParseCoprocNumOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { parseCoprocNumOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
SMLoc S = Parser.getTok().getLoc(); SMLoc S = Parser.getTok().getLoc();
const AsmToken &Tok = Parser.getTok(); const AsmToken &Tok = Parser.getTok();
assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier");
@ -1378,11 +1378,11 @@ tryParseCoprocNumOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
return MatchOperand_Success; return MatchOperand_Success;
} }
/// tryParseCoprocRegOperand - Try to parse an coprocessor register operand. The /// parseCoprocRegOperand - Try to parse an coprocessor register operand. The
/// token must be an Identifier when called, and if it is a coprocessor /// token must be an Identifier when called, and if it is a coprocessor
/// number, the token is eaten and the operand is added to the operand list. /// number, the token is eaten and the operand is added to the operand list.
ARMAsmParser::OperandMatchResultTy ARMAsmParser:: ARMAsmParser::OperandMatchResultTy ARMAsmParser::
tryParseCoprocRegOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { parseCoprocRegOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
SMLoc S = Parser.getTok().getLoc(); SMLoc S = Parser.getTok().getLoc();
const AsmToken &Tok = Parser.getTok(); const AsmToken &Tok = Parser.getTok();
assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier");
@ -1480,9 +1480,9 @@ ParseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
return false; return false;
} }
/// tryParseMemBarrierOptOperand - Try to parse DSB/DMB data barrier options. /// parseMemBarrierOptOperand - Try to parse DSB/DMB data barrier options.
ARMAsmParser::OperandMatchResultTy ARMAsmParser:: ARMAsmParser::OperandMatchResultTy ARMAsmParser::
tryParseMemBarrierOptOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { parseMemBarrierOptOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
SMLoc S = Parser.getTok().getLoc(); SMLoc S = Parser.getTok().getLoc();
const AsmToken &Tok = Parser.getTok(); const AsmToken &Tok = Parser.getTok();
assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier");
@ -1511,9 +1511,9 @@ tryParseMemBarrierOptOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
return MatchOperand_Success; return MatchOperand_Success;
} }
/// tryParseProcIFlagsOperand - Try to parse iflags from CPS instruction. /// parseProcIFlagsOperand - Try to parse iflags from CPS instruction.
ARMAsmParser::OperandMatchResultTy ARMAsmParser:: ARMAsmParser::OperandMatchResultTy ARMAsmParser::
tryParseProcIFlagsOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { parseProcIFlagsOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
SMLoc S = Parser.getTok().getLoc(); SMLoc S = Parser.getTok().getLoc();
const AsmToken &Tok = Parser.getTok(); const AsmToken &Tok = Parser.getTok();
assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier");
@ -1540,9 +1540,9 @@ tryParseProcIFlagsOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
return MatchOperand_Success; return MatchOperand_Success;
} }
/// tryParseMSRMaskOperand - Try to parse mask flags from MSR instruction. /// parseMSRMaskOperand - Try to parse mask flags from MSR instruction.
ARMAsmParser::OperandMatchResultTy ARMAsmParser:: ARMAsmParser::OperandMatchResultTy ARMAsmParser::
tryParseMSRMaskOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { parseMSRMaskOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
SMLoc S = Parser.getTok().getLoc(); SMLoc S = Parser.getTok().getLoc();
const AsmToken &Tok = Parser.getTok(); const AsmToken &Tok = Parser.getTok();
assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier");
@ -1606,9 +1606,9 @@ tryParseMSRMaskOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
return MatchOperand_Success; return MatchOperand_Success;
} }
/// tryParseMemMode2Operand - Try to parse memory addressing mode 2 operand. /// parseMemMode2Operand - Try to parse memory addressing mode 2 operand.
ARMAsmParser::OperandMatchResultTy ARMAsmParser:: ARMAsmParser::OperandMatchResultTy ARMAsmParser::
tryParseMemMode2Operand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { parseMemMode2Operand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
assert(Parser.getTok().is(AsmToken::LBrac) && "Token is not a \"[\""); assert(Parser.getTok().is(AsmToken::LBrac) && "Token is not a \"[\"");
if (ParseMemory(Operands, ARMII::AddrMode2)) if (ParseMemory(Operands, ARMII::AddrMode2))
@ -1617,9 +1617,9 @@ tryParseMemMode2Operand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
return MatchOperand_Success; return MatchOperand_Success;
} }
/// tryParseMemMode3Operand - Try to parse memory addressing mode 3 operand. /// parseMemMode3Operand - Try to parse memory addressing mode 3 operand.
ARMAsmParser::OperandMatchResultTy ARMAsmParser:: ARMAsmParser::OperandMatchResultTy ARMAsmParser::
tryParseMemMode3Operand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { parseMemMode3Operand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
assert(Parser.getTok().is(AsmToken::LBrac) && "Token is not a \"[\""); assert(Parser.getTok().is(AsmToken::LBrac) && "Token is not a \"[\"");
if (ParseMemory(Operands, ARMII::AddrMode3)) if (ParseMemory(Operands, ARMII::AddrMode3))