[mips][microMIPS] Implement LWXS instruction.

Differential Revision: http://reviews.llvm.org/D5407


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222348 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jozef Kolek 2014-11-19 11:39:12 +00:00
parent baf97d8987
commit 43ae00e4e0
3 changed files with 26 additions and 0 deletions

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@ -789,3 +789,18 @@ class RDHWR_FM_MM : MMArch {
let Inst{15-6} = 0x1ac;
let Inst{5-0} = 0x3c;
}
class LWXS_FM_MM<bits<10> funct> {
bits<5> rd;
bits<5> base;
bits<5> index;
bits<32> Inst;
let Inst{31-26} = 0x0;
let Inst{25-21} = index;
let Inst{20-16} = base;
let Inst{15-11} = rd;
let Inst{10} = 0;
let Inst{9-0} = funct;
}

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@ -260,6 +260,12 @@ let isCall = 1, hasDelaySlot = 1, Defs = [RA] in {
!strconcat(opstr, "\t$rs, $offset"), [], IIBranch, FrmI, opstr>;
}
class LoadWordIndexedScaledMM<string opstr, RegisterOperand RO,
InstrItinClass Itin = NoItinerary,
SDPatternOperator OpNode = null_frag> :
InstSE<(outs RO:$rd), (ins PtrRC:$base, PtrRC:$index),
!strconcat(opstr, "\t$rd, ${index}(${base})"), [], Itin, FrmFI>;
def ADDU16_MM : ArithRMM16<"addu16", GPRMM16Opnd, 1, II_ADDU, add>,
ARITH_FM_MM16<0>;
def SUBU16_MM : ArithRMM16<"subu16", GPRMM16Opnd, 0, II_SUBU, sub>,
@ -377,6 +383,8 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in {
def SW_MM : Store<"sw", GPR32Opnd>, MMRel, LW_FM_MM<0x3e>;
}
def LWXS_MM : LoadWordIndexedScaledMM<"lwxs", GPR32Opnd>, LWXS_FM_MM<0x118>;
def LWU_MM : LoadMM<"lwu", GPR32Opnd, zextloadi32, II_LWU>, LL_FM_MM<0xe>;
/// Load and Store Instructions - unaligned

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@ -20,6 +20,7 @@
# CHECK-EL: ll $2, 8($4) # encoding: [0x44,0x60,0x08,0x30]
# CHECK-EL: sc $2, 8($4) # encoding: [0x44,0x60,0x08,0xb0]
# CHECK-EL: lwu $2, 8($4) # encoding: [0x44,0x60,0x08,0xe0]
# CHECK-EL: lwxs $2, $3($4) # encoding: [0x64,0x00,0x18,0x11]
#------------------------------------------------------------------------------
# Big endian
#------------------------------------------------------------------------------
@ -34,6 +35,7 @@
# CHECK-EB: ll $2, 8($4) # encoding: [0x60,0x44,0x30,0x08]
# CHECK-EB: sc $2, 8($4) # encoding: [0x60,0x44,0xb0,0x08]
# CHECK-EB: lwu $2, 8($4) # encoding: [0x60,0x44,0xe0,0x08]
# CHECK-EB: lwxs $2, $3($4) # encoding: [0x00,0x64,0x11,0x18]
lb $5, 8($4)
lbu $6, 8($4)
lh $2, 8($4)
@ -45,3 +47,4 @@
ll $2, 8($4)
sc $2, 8($4)
lwu $2, 8($4)
lwxs $2, $3($4)