From 43b61f724ef68810c63fc54c99e88f9b278f05c0 Mon Sep 17 00:00:00 2001 From: Alkis Evlogimenos Date: Mon, 12 Apr 2004 17:39:20 +0000 Subject: [PATCH] Correctly compute spill weights git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12869 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/LiveIntervalAnalysis.cpp | 37 ++++++++++++++-------------- 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 7665d8774d5..371dfd1c345 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -133,24 +133,10 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { for (MachineBasicBlock::iterator mii = mbb->begin(), mie = mbb->end(); mii != mie; ) { - for (unsigned i = 0; i < mii->getNumOperands(); ++i) { - const MachineOperand& mop = mii->getOperand(i); - if (mop.isRegister() && mop.getReg()) { - // replace register with representative register - unsigned reg = rep(mop.getReg()); - mii->SetMachineOperandReg(i, reg); - - if (MRegisterInfo::isVirtualRegister(reg)) { - Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg); - assert(r2iit != r2iMap_.end()); - r2iit->second->weight += pow(10.0F, loopDepth); - } - } - } - - // if the move is now an identity move delete it + // if the move will be an identity move delete it unsigned srcReg, dstReg; - if (tii.isMoveInstr(*mii, srcReg, dstReg) && srcReg == dstReg) { + if (tii.isMoveInstr(*mii, srcReg, dstReg) && + rep(srcReg) == rep(dstReg)) { // remove from def list Interval& interval = getOrCreateInterval(dstReg); unsigned defIndex = getInstructionIndex(mii); @@ -168,8 +154,23 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { mii = mbbi->erase(mii); ++numPeep; } - else + else { + for (unsigned i = 0; i < mii->getNumOperands(); ++i) { + const MachineOperand& mop = mii->getOperand(i); + if (mop.isRegister() && mop.getReg() && + MRegisterInfo::isVirtualRegister(mop.getReg())) { + // replace register with representative register + unsigned reg = rep(mop.getReg()); + mii->SetMachineOperandReg(i, reg); + + Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg); + assert(r2iit != r2iMap_.end()); + r2iit->second->weight += + (mop.isUse() + mop.isDef()) * pow(10.0F, loopDepth); + } + } ++mii; + } } }