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Added Subtarget support into RegisterInfo

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Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and 
-mno-shared). HasAbsoluteCall is not implemented but HasABICall is the 
default for o32 ABI. Now, both should help into a more accurate 
relocation types implementation. 
Added IsLinux is needed to choose between asm directives.
Instruction name strings cleanup.
AsmPrinter improved.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53551 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes
2008-07-14 14:42:54 +00:00
parent 91e1c32dd0
commit 43d526d162
9 changed files with 200 additions and 116 deletions
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22
lib/Target/Mips/MipsRegisterInfo.cpp
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@@ -14,6 +14,7 @@
#define DEBUG_TYPE "mips-reg-info"
#include "Mips.h"
#include "MipsSubtarget.h"
#include "MipsRegisterInfo.h"
#include "MipsMachineFunction.h"
#include "llvm/Constants.h"
@@ -35,9 +36,10 @@
using namespace llvm;
MipsRegisterInfo::MipsRegisterInfo(const TargetInstrInfo &tii)
MipsRegisterInfo::MipsRegisterInfo(const MipsSubtarget &ST,
const TargetInstrInfo &tii)
: MipsGenRegisterInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP),
TII(tii) {}
Subtarget(ST), TII(tii) {}
/// getRegisterNumbering - Given the enum value for some register, e.g.
/// Mips::RA, return the number that it corresponds to (e.g. 31).
@@ -82,10 +84,10 @@ getRegisterNumbering(unsigned RegEnum)
return 0; // Not reached
}
unsigned MipsRegisterInfo::getPICCallReg(void) { return Mips::T9; }
//===----------------------------------------------------------------------===//
//
// Callee Saved Registers methods
//
//===----------------------------------------------------------------------===//
/// Mips Callee Saved Registers
@@ -306,9 +308,12 @@ emitPrologue(MachineFunction &MF) const
// Update frame info
MFI->setStackSize(NumBytes);
// PIC speficic function prologue
if (isPIC)
BuildMI(MBB, MBBI, TII.get(Mips::CPLOAD)).addReg(Mips::T9);
BuildMI(MBB, MBBI, TII.get(Mips::NOREORDER));
// TODO: check need from GP here.
if (isPIC && Subtarget.isABI_O32())
BuildMI(MBB, MBBI, TII.get(Mips::CPLOAD)).addReg(getPICCallReg());
BuildMI(MBB, MBBI, TII.get(Mips::NOMACRO));
// Adjust stack : addi sp, sp, (-imm)
BuildMI(MBB, MBBI, TII.get(Mips::ADDiu), Mips::SP)
@@ -334,9 +339,10 @@ emitPrologue(MachineFunction &MF) const
}
// PIC speficic function prologue
if ((isPIC) && (MFI->hasCalls()))
if ((isPIC) && (MFI->hasCalls())) {
BuildMI(MBB, MBBI, TII.get(Mips::CPRESTORE))
.addImm(MipsFI->getGPStackOffset());
}
}
void MipsRegisterInfo::