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Change the interface to PromoteMemToReg to also take a DominatorTree

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8883 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2003-10-05 21:20:13 +00:00
parent 5b15deedc0
commit 43f820d1f7
5 changed files with 17 additions and 6 deletions
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5
lib/Transforms/Scalar/ScalarReplAggregates.cpp
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@@ -38,6 +38,7 @@ namespace {
// getAnalysisUsage - This pass does not require any passes, but we know it
// will not alter the CFG, so say so.
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<DominatorTree>();
AU.addRequired<DominanceFrontier>();
AU.addRequired<TargetData>();
AU.setPreservesCFG();
@@ -74,6 +75,8 @@ bool SROA::runOnFunction(Function &F) {
bool SROA::performPromotion(Function &F) {
std::vector<AllocaInst*> Allocas;
const TargetData &TD = getAnalysis<TargetData>();
DominatorTree &DT = getAnalysis<DominatorTree>();
DominanceFrontier &DF = getAnalysis<DominanceFrontier>();
BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function
@@ -91,7 +94,7 @@ bool SROA::performPromotion(Function &F) {
if (Allocas.empty()) break;
PromoteMemToReg(Allocas, getAnalysis<DominanceFrontier>(), TD);
PromoteMemToReg(Allocas, DT, DF, TD);
NumPromoted += Allocas.size();
Changed = true;
}