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If both parts of smul_lohi, etc. are used, don't simplify. If only one part is used, try simplify it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43888 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
parent
01f43a4d55
commit
4471194d69
@ -1420,7 +1420,8 @@ SDOperand DAGCombiner::visitMULHU(SDNode *N) {
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bool DAGCombiner::SimplifyNodeWithTwoResults(SDNode *N,
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unsigned LoOp, unsigned HiOp) {
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// If the high half is not needed, just compute the low half.
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if (!N->hasAnyUseOfValue(1) &&
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bool HiExists = N->hasAnyUseOfValue(1);
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if (!HiExists &&
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(!AfterLegalize ||
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TLI.isOperationLegal(LoOp, N->getValueType(0)))) {
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DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0),
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@ -1431,7 +1432,8 @@ bool DAGCombiner::SimplifyNodeWithTwoResults(SDNode *N,
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}
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// If the low half is not needed, just compute the high half.
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if (!N->hasAnyUseOfValue(0) &&
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bool LoExists = N->hasAnyUseOfValue(0);
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if (!LoExists &&
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(!AfterLegalize ||
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TLI.isOperationLegal(HiOp, N->getValueType(1)))) {
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DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 1),
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@ -1441,36 +1443,35 @@ bool DAGCombiner::SimplifyNodeWithTwoResults(SDNode *N,
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return true;
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}
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// If the two computed results can be siplified separately, separate them.
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SDOperand Lo = DAG.getNode(LoOp, N->getValueType(0),
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N->op_begin(), N->getNumOperands());
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SDOperand Hi = DAG.getNode(HiOp, N->getValueType(1),
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N->op_begin(), N->getNumOperands());
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unsigned LoExists = !Lo.use_empty();
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unsigned HiExists = !Hi.use_empty();
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SDOperand LoOpt = Lo;
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SDOperand HiOpt = Hi;
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if (!LoExists || !HiExists) {
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SDOperand Pair = DAG.getNode(ISD::BUILD_PAIR, MVT::Other, Lo, Hi);
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assert(Pair.use_empty() && "Pair with type MVT::Other already exists!");
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LoOpt = combine(Lo.Val);
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HiOpt = combine(Hi.Val);
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if (!LoOpt.Val)
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LoOpt = Pair.getOperand(0);
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if (!HiOpt.Val)
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HiOpt = Pair.getOperand(1);
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DAG.DeleteNode(Pair.Val);
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}
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if ((LoExists || LoOpt != Lo) &&
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(HiExists || HiOpt != Hi) &&
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TLI.isOperationLegal(LoOpt.getOpcode(), LoOpt.getValueType()) &&
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TLI.isOperationLegal(HiOpt.getOpcode(), HiOpt.getValueType())) {
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DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), LoOpt);
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DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 1), HiOpt);
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return true;
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// If both halves are used, return as it is.
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if (LoExists && HiExists)
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return false;
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// If the two computed results can be simplified separately, separate them.
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bool RetVal = false;
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if (LoExists) {
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SDOperand Lo = DAG.getNode(LoOp, N->getValueType(0),
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N->op_begin(), N->getNumOperands());
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SDOperand LoOpt = combine(Lo.Val);
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if (LoOpt.Val && LoOpt != Lo &&
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TLI.isOperationLegal(LoOpt.getOpcode(), LoOpt.getValueType())) {
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RetVal = true;
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DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), LoOpt);
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}
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}
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return false;
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if (HiExists) {
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SDOperand Hi = DAG.getNode(HiOp, N->getValueType(1),
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N->op_begin(), N->getNumOperands());
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SDOperand HiOpt = combine(Hi.Val);
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if (HiOpt.Val && HiOpt != Hi &&
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TLI.isOperationLegal(HiOpt.getOpcode(), HiOpt.getValueType())) {
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RetVal = true;
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DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 1), HiOpt);
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}
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}
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return RetVal;
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}
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SDOperand DAGCombiner::visitSMUL_LOHI(SDNode *N) {
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129
test/CodeGen/X86/2007-11-07-MulBy4.ll
Normal file
129
test/CodeGen/X86/2007-11-07-MulBy4.ll
Normal file
@ -0,0 +1,129 @@
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; RUN: llvm-as < %s | llc -march=x86 | not grep imul
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%struct.eebb = type { %struct.eebb*, i16* }
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%struct.hf = type { %struct.hf*, i16*, i8*, i32, i32, %struct.eebb*, i32, i32, i8*, i8*, i8*, i8*, i16*, i8*, i16*, %struct.ri, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [30 x i32], %struct.eebb, i32, i8* }
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%struct.foo_data = type { i32, i32, i32, i32*, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i16*, i16*, i16*, i16*, i32, i32, i32, %struct.ri*, i8*, %struct.hf* }
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%struct.ri = type { %struct.ri*, i32, i8*, i16*, i32*, i32 }
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define fastcc i32 @foo(i16* %eptr, i8* %ecode, %struct.foo_data* %md, i32 %ims) {
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entry:
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%tmp36 = load i32* null, align 4 ; <i32> [#uses=1]
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%tmp37 = icmp ult i32 0, %tmp36 ; <i1> [#uses=1]
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br i1 %tmp37, label %cond_next79, label %cond_true
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cond_true: ; preds = %entry
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ret i32 0
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cond_next79: ; preds = %entry
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%tmp85 = load i32* null, align 4 ; <i32> [#uses=1]
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%tmp86 = icmp ult i32 0, %tmp85 ; <i1> [#uses=1]
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br i1 %tmp86, label %cond_next130, label %cond_true89
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cond_true89: ; preds = %cond_next79
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ret i32 0
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cond_next130: ; preds = %cond_next79
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%tmp173 = icmp eq i32 0, 0 ; <i1> [#uses=1]
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br i1 %tmp173, label %cond_next201, label %cond_true176
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cond_true176: ; preds = %cond_next130
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ret i32 0
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cond_next201: ; preds = %cond_next130
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switch i32 0, label %bb19955 [
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i32 0, label %bb1266
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i32 1, label %bb5018
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i32 2, label %bb5075
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i32 3, label %cond_true5534
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i32 4, label %cond_true5534
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i32 5, label %bb6039
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i32 6, label %bb6181
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i32 7, label %bb6323
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i32 8, label %bb6463
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i32 9, label %bb6605
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i32 10, label %bb6746
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i32 11, label %cond_next5871
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i32 16, label %bb5452
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i32 17, label %bb5395
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i32 19, label %bb4883
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i32 20, label %bb5136
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i32 23, label %bb12899
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i32 64, label %bb2162
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i32 69, label %bb1447
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i32 70, label %bb1737
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i32 71, label %bb1447
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i32 72, label %bb1737
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i32 73, label %cond_true1984
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i32 75, label %bb740
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i32 80, label %bb552
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]
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bb552: ; preds = %cond_next201
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ret i32 0
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bb740: ; preds = %cond_next201
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ret i32 0
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bb1266: ; preds = %cond_next201
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ret i32 0
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bb1447: ; preds = %cond_next201, %cond_next201
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ret i32 0
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bb1737: ; preds = %cond_next201, %cond_next201
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ret i32 0
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cond_true1984: ; preds = %cond_next201
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ret i32 0
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bb2162: ; preds = %cond_next201
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ret i32 0
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bb4883: ; preds = %cond_next201
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ret i32 0
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bb5018: ; preds = %cond_next201
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ret i32 0
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bb5075: ; preds = %cond_next201
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ret i32 0
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bb5136: ; preds = %cond_next201
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ret i32 0
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bb5395: ; preds = %cond_next201
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ret i32 0
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bb5452: ; preds = %cond_next201
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ret i32 0
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cond_true5534: ; preds = %cond_next201, %cond_next201
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ret i32 0
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cond_next5871: ; preds = %cond_next201
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ret i32 0
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bb6039: ; preds = %cond_next201
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ret i32 0
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bb6181: ; preds = %cond_next201
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ret i32 0
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bb6323: ; preds = %cond_next201
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ret i32 0
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bb6463: ; preds = %cond_next201
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ret i32 0
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bb6605: ; preds = %cond_next201
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ret i32 0
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bb6746: ; preds = %cond_next201
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ret i32 0
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bb12899: ; preds = %cond_next201
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ret i32 0
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bb19955: ; preds = %cond_next201
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ret i32 0
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}
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