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Rewrite calculateDbgValueHistory to make it (hopefully) more transparent.
This change preserves the original algorithm of generating history for user variables, but makes it more clear. High-level description of algorithm: Scan all the machine basic blocks and machine instructions in the order they are emitted to the object file. Do the following: 1) If we see a DBG_VALUE instruction, add it to the history of the corresponding user variable. Keep track of all user variables, whose locations are described by a register. 2) If we see a regular instruction, look at all the registers it clobbers, and terminate the location range for all variables described by these registers. 3) At the end of the basic block, terminate location ranges for all user variables described by some register. Although this change shouldn't be user-visible (the contents of .debug_loc section should be the same), it changes some internal assumptions about the set of instructions used to track the variable locations. Watching the bots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209225 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alexey Samsonov
parent
e2ab467b90
commit
447a7ce76c
@ -8,141 +8,160 @@
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//===----------------------------------------------------------------------===//
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#include "DbgValueHistoryCalculator.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include <algorithm>
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#include <map>
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#define DEBUG_TYPE "dwarfdebug"
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namespace llvm {
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// Return true if debug value, encoded by DBG_VALUE instruction, is in a
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// defined reg.
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static bool isDbgValueInDefinedReg(const MachineInstr *MI) {
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assert(MI->isDebugValue() && "Invalid DBG_VALUE machine instruction!");
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return MI->getNumOperands() == 3 && MI->getOperand(0).isReg() &&
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MI->getOperand(0).getReg() &&
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(MI->getOperand(1).isImm() ||
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(MI->getOperand(1).isReg() && MI->getOperand(1).getReg() == 0U));
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namespace {
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// Maps physreg numbers to the variables they describe.
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typedef std::map<unsigned, SmallVector<const MDNode *, 1>> RegDescribedVarsMap;
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}
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// \brief If @MI is a DBG_VALUE with debug value described by a
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// defined register, returns the number of this register.
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// In the other case, returns 0.
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static unsigned isDescribedByReg(const MachineInstr &MI) {
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assert(MI.isDebugValue());
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assert(MI.getNumOperands() == 3);
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// If location of variable is described using a register (directly or
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// indirecltly), this register is always a first operand.
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return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
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}
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// \brief Claim that @Var is not described by @RegNo anymore.
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static void dropRegDescribedVar(RegDescribedVarsMap &RegVars,
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unsigned RegNo, const MDNode *Var) {
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const auto &I = RegVars.find(RegNo);
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assert(RegNo != 0U && I != RegVars.end());
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auto &VarSet = I->second;
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const auto &VarPos = std::find(VarSet.begin(), VarSet.end(), Var);
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assert(VarPos != VarSet.end());
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VarSet.erase(VarPos);
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// Don't keep empty sets in a map to keep it as small as possible.
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if (VarSet.empty())
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RegVars.erase(I);
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}
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// \brief Claim that @Var is now described by @RegNo.
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static void addRegDescribedVar(RegDescribedVarsMap &RegVars,
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unsigned RegNo, const MDNode *Var) {
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assert(RegNo != 0U);
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RegVars[RegNo].push_back(Var);
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}
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static void clobberVariableLocation(SmallVectorImpl<const MachineInstr *> &VarHistory,
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const MachineInstr &ClobberingInstr) {
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assert(!VarHistory.empty());
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// DBG_VALUE we're clobbering should belong to the same MBB.
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assert(VarHistory.back()->isDebugValue());
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assert(VarHistory.back()->getParent() == ClobberingInstr.getParent());
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VarHistory.push_back(&ClobberingInstr);
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}
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// \brief Terminate the location range for variables described by register
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// @RegNo by inserting @ClobberingInstr to their history.
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static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo,
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DbgValueHistoryMap &HistMap,
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const MachineInstr &ClobberingInstr) {
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const auto &I = RegVars.find(RegNo);
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if (I == RegVars.end())
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return;
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// Iterate over all variables described by this register and add this
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// instruction to their history, clobbering it.
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for (const auto &Var : I->second)
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clobberVariableLocation(HistMap[Var], ClobberingInstr);
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RegVars.erase(I);
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}
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// \brief Terminate the location range for all variables, described by registers
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// clobbered by @MI.
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static void clobberRegisterUses(RegDescribedVarsMap &RegVars,
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const MachineInstr &MI,
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const TargetRegisterInfo *TRI,
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DbgValueHistoryMap &HistMap) {
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for (const MachineOperand &MO : MI.operands()) {
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if (!MO.isReg() || !MO.isDef() || !MO.getReg())
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continue;
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for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
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++AI) {
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unsigned RegNo = *AI;
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clobberRegisterUses(RegVars, RegNo, HistMap, MI);
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}
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}
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}
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// \brief Terminate the location range for all register-described variables
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// by inserting @ClobberingInstr to their history.
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static void clobberAllRegistersUses(RegDescribedVarsMap &RegVars,
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DbgValueHistoryMap &HistMap,
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const MachineInstr &ClobberingInstr) {
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for (const auto &I : RegVars)
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for (const auto &Var : I.second)
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clobberVariableLocation(HistMap[Var], ClobberingInstr);
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RegVars.clear();
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}
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// \brief Update the register that describes location of @Var in @RegVars map.
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static void
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updateRegForVariable(RegDescribedVarsMap &RegVars, const MDNode *Var,
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const SmallVectorImpl<const MachineInstr *> &VarHistory,
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const MachineInstr &MI) {
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if (!VarHistory.empty()) {
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const MachineInstr &Prev = *VarHistory.back();
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// Check if Var is currently described by a register by instruction in the
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// same basic block.
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if (Prev.isDebugValue() && Prev.getDebugVariable() == Var &&
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Prev.getParent() == MI.getParent()) {
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if (unsigned PrevReg = isDescribedByReg(Prev))
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dropRegDescribedVar(RegVars, PrevReg, Var);
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}
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}
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assert(MI.getDebugVariable() == Var);
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if (unsigned MIReg = isDescribedByReg(MI))
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addRegDescribedVar(RegVars, MIReg, Var);
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}
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void calculateDbgValueHistory(const MachineFunction *MF,
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const TargetRegisterInfo *TRI,
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DbgValueHistoryMap &Result) {
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// LiveUserVar - Map physreg numbers to the MDNode they contain.
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std::vector<const MDNode *> LiveUserVar(TRI->getNumRegs());
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RegDescribedVarsMap RegVars;
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for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
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++I) {
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bool AtBlockEntry = true;
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for (const auto &MI : *I) {
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if (MI.isDebugValue()) {
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assert(MI.getNumOperands() > 1 && "Invalid machine instruction!");
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// Keep track of user variables.
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const MDNode *Var = MI.getDebugVariable();
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// Variable is in a register, we need to check for clobbers.
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if (isDbgValueInDefinedReg(&MI))
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LiveUserVar[MI.getOperand(0).getReg()] = Var;
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// Check the history of this variable.
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SmallVectorImpl<const MachineInstr *> &History = Result[Var];
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if (!History.empty()) {
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// We have seen this variable before. Try to coalesce DBG_VALUEs.
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const MachineInstr *Prev = History.back();
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if (Prev->isDebugValue()) {
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// Coalesce identical entries at the end of History.
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if (History.size() >= 2 &&
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Prev->isIdenticalTo(History[History.size() - 2])) {
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DEBUG(dbgs() << "Coalescing identical DBG_VALUE entries:\n"
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<< "\t" << *Prev << "\t"
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<< *History[History.size() - 2] << "\n");
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History.pop_back();
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}
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// Terminate old register assignments that don't reach MI;
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MachineFunction::const_iterator PrevMBB = Prev->getParent();
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if (PrevMBB != I && (!AtBlockEntry || std::next(PrevMBB) != I) &&
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isDbgValueInDefinedReg(Prev)) {
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// Previous register assignment needs to terminate at the end of
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// its basic block.
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MachineBasicBlock::const_iterator LastMI =
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PrevMBB->getLastNonDebugInstr();
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if (LastMI == PrevMBB->end()) {
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// Drop DBG_VALUE for empty range.
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DEBUG(dbgs() << "Dropping DBG_VALUE for empty range:\n"
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<< "\t" << *Prev << "\n");
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History.pop_back();
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} else if (std::next(PrevMBB) != PrevMBB->getParent()->end())
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// Terminate after LastMI.
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History.push_back(LastMI);
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}
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}
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}
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History.push_back(&MI);
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} else {
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// Not a DBG_VALUE instruction.
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if (!MI.isPosition())
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AtBlockEntry = false;
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// Check if the instruction clobbers any registers with debug vars.
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for (const MachineOperand &MO : MI.operands()) {
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if (!MO.isReg() || !MO.isDef() || !MO.getReg())
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continue;
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for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
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++AI) {
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unsigned Reg = *AI;
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const MDNode *Var = LiveUserVar[Reg];
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if (!Var)
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continue;
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// Reg is now clobbered.
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LiveUserVar[Reg] = nullptr;
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// Was MD last defined by a DBG_VALUE referring to Reg?
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auto HistI = Result.find(Var);
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if (HistI == Result.end())
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continue;
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SmallVectorImpl<const MachineInstr *> &History = HistI->second;
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if (History.empty())
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continue;
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const MachineInstr *Prev = History.back();
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// Sanity-check: Register assignments are terminated at the end of
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// their block.
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if (!Prev->isDebugValue() || Prev->getParent() != MI.getParent())
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continue;
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// Is the variable still in Reg?
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if (!isDbgValueInDefinedReg(Prev) ||
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Prev->getOperand(0).getReg() != Reg)
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continue;
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// Var is clobbered. Make sure the next instruction gets a label.
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History.push_back(&MI);
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}
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}
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for (const auto &MBB : *MF) {
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for (const auto &MI : MBB) {
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if (!MI.isDebugValue()) {
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// Not a DBG_VALUE instruction. It may clobber registers which describe
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// some variables.
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clobberRegisterUses(RegVars, MI, TRI, Result);
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continue;
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}
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}
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}
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// Make sure the final register assignments are terminated.
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for (auto &I : Result) {
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SmallVectorImpl<const MachineInstr *> &History = I.second;
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if (History.empty())
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continue;
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const MDNode *Var = MI.getDebugVariable();
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auto &History = Result[Var];
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const MachineInstr *Prev = History.back();
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if (Prev->isDebugValue() && isDbgValueInDefinedReg(Prev)) {
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const MachineBasicBlock *PrevMBB = Prev->getParent();
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MachineBasicBlock::const_iterator LastMI =
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PrevMBB->getLastNonDebugInstr();
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if (LastMI == PrevMBB->end())
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// Drop DBG_VALUE for empty range.
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History.pop_back();
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else if (PrevMBB != &PrevMBB->getParent()->back()) {
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// Terminate after LastMI.
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History.push_back(LastMI);
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if (!History.empty() && History.back()->isIdenticalTo(&MI)) {
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DEBUG(dbgs() << "Coalescing identical DBG_VALUE entries:\n"
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<< "\t" << History.back() << "\t" << MI << "\n");
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continue;
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}
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updateRegForVariable(RegVars, Var, History, MI);
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History.push_back(&MI);
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}
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// Make sure locations for register-described variables are valid only
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// until the end of the basic block (unless it's the last basic block, in
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// which case let their liveness run off to the end of the function).
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if (!MBB.empty() && &MBB != &MF->back())
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clobberAllRegistersUses(RegVars, Result, MBB.back());
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}
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}
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@ -20,9 +20,10 @@ class MachineInstr;
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class MDNode;
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class TargetRegisterInfo;
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// For each user variable, keep a list of DBG_VALUE instructions in order.
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// The list can also contain normal instructions that clobber the previous
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// DBG_VALUE. The variables are listed in order of appearance.
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// For each user variable, keep a list of DBG_VALUE instructions for it
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// in the order of appearance. The list can also contain another
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// instructions, which are assumed to clobber the previous DBG_VALUE.
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// The variables are listed in order of appearance.
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typedef MapVector<const MDNode *, SmallVector<const MachineInstr *, 4>>
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DbgValueHistoryMap;
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@ -1201,10 +1201,10 @@ DwarfDebug::collectVariableInfo(SmallPtrSet<const MDNode *, 16> &Processed) {
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const MachineInstr *End = HI[1];
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DEBUG(dbgs() << "DotDebugLoc Pair:\n"
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<< "\t" << *Begin << "\t" << *End << "\n");
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if (End->isDebugValue())
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if (End->isDebugValue() && End->getDebugVariable() == DV)
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SLabel = getLabelBeforeInsn(End);
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else {
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// End is a normal instruction clobbering the range.
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// End is clobbering the range.
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SLabel = getLabelAfterInsn(End);
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assert(SLabel && "Forgot label after clobber instruction");
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++HI;
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@ -1415,7 +1415,7 @@ void DwarfDebug::beginFunction(const MachineFunction *MF) {
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LabelsBeforeInsn[History.front()] = FunctionBeginSym;
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for (const MachineInstr *MI : History) {
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if (MI->isDebugValue())
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if (MI->isDebugValue() && MI->getDebugVariable() == DV)
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requestLabelBeforeInsn(MI);
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else
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requestLabelAfterInsn(MI);
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