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Allow patterns to refer to physical registers that belong to multiple

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register classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28323 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-05-16 07:05:30 +00:00
parent c14c936c79
commit 44a65fa552
3 changed files with 26 additions and 6 deletions
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17
utils/TableGen/CodeGenTarget.cpp
View File

@ -163,6 +163,23 @@ void CodeGenTarget::ReadRegisterClasses() const {
RegisterClasses.assign(RegClasses.begin(), RegClasses.end()); RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
} }
std::vector<unsigned char> CodeGenTarget::getRegisterVTs(Record *R) const {
std::vector<unsigned char> Result;
const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
const CodeGenRegisterClass &RC = RegisterClasses[i];
for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
if (R == RC.Elements[ei]) {
const std::vector<MVT::ValueType> &InVTs = RC.getValueTypes();
for (unsigned i = 0, e = InVTs.size(); i != e; ++i)
Result.push_back(InVTs[i]);
}
}
}
return Result;
}
CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) { CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
// Rename anonymous register classes. // Rename anonymous register classes.
if (R->getName().size() > 9 && R->getName()[9] == '.') { if (R->getName().size() > 9 && R->getName()[9] == '.') {

4
utils/TableGen/CodeGenTarget.h
View File

@ -111,6 +111,10 @@ public:
return FoundRC; return FoundRC;
} }
/// getRegisterVTs - Find the union of all possible ValueTypes for the
/// specified physical register.
std::vector<unsigned char> getRegisterVTs(Record *R) const;
const std::vector<MVT::ValueType> &getLegalValueTypes() const { const std::vector<MVT::ValueType> &getLegalValueTypes() const {
if (LegalValueTypes.empty()) ReadLegalValueTypes(); if (LegalValueTypes.empty()) ReadLegalValueTypes();
return LegalValueTypes; return LegalValueTypes;

11
utils/TableGen/DAGISelEmitter.cpp
View File

@ -565,12 +565,8 @@ static std::vector<unsigned char> getImplicitType(Record *R, bool NotRegisters,
} else if (R->isSubClassOf("Register")) { } else if (R->isSubClassOf("Register")) {
if (NotRegisters) if (NotRegisters)
return Unknown; return Unknown;
// If the register appears in exactly one regclass, and the regclass has one
// value type, use it as the known type.
const CodeGenTarget &T = TP.getDAGISelEmitter().getTargetInfo(); const CodeGenTarget &T = TP.getDAGISelEmitter().getTargetInfo();
if (const CodeGenRegisterClass *RC = T.getRegisterClassForRegister(R)) return T.getRegisterVTs(R);
return ConvertVTs(RC->getValueTypes());
return Unknown;
} else if (R->isSubClassOf("ValueType") || R->isSubClassOf("CondCode")) { } else if (R->isSubClassOf("ValueType") || R->isSubClassOf("CondCode")) {
// Using a VTSDNode or CondCodeSDNode. // Using a VTSDNode or CondCodeSDNode.
return Other; return Other;
@ -607,7 +603,10 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
// At some point, it may make sense for this tree pattern to have // At some point, it may make sense for this tree pattern to have
// multiple types. Assert here that it does not, so we revisit this // multiple types. Assert here that it does not, so we revisit this
// code when appropriate. // code when appropriate.
assert(getExtTypes().size() == 1 && "TreePattern has too many types!"); assert(getExtTypes().size() >= 1 && "TreePattern does not have a type!");
MVT::ValueType VT = getTypeNum(0);
for (unsigned i = 1, e = getExtTypes().size(); i != e; ++i)
assert(getTypeNum(i) == VT && "TreePattern has too many types!");
unsigned Size = MVT::getSizeInBits(getTypeNum(0)); unsigned Size = MVT::getSizeInBits(getTypeNum(0));
// Make sure that the value is representable for this type. // Make sure that the value is representable for this type.