diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index a871ed7d449..4c3be89b3ec 100644
--- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -1080,7 +1080,7 @@ bool ARMLoadStoreOpt::FixInvalidRegPairOp(MachineBasicBlock &MBB,
     unsigned OddRegNum  = TRI->getDwarfRegNum(OddReg, false);
     // ARM errata 602117: LDRD with base in list may result in incorrect base
     // register when interrupted or faulted.
-    bool Errata602117 = EvenReg == BaseReg && STI->getCPUString() == "cortex-m3";
+    bool Errata602117 = EvenReg == BaseReg && STI->isCortexM3();
     if (!Errata602117 &&
         ((EvenRegNum & 1) == 0 && (EvenRegNum + 1) == OddRegNum))
       return false;
diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h
index 5e884e00991..a35f4505507 100644
--- a/lib/Target/ARM/ARMSubtarget.h
+++ b/lib/Target/ARM/ARMSubtarget.h
@@ -191,6 +191,7 @@ protected:
 
   bool isCortexA8() const { return ARMProcFamily == CortexA8; }
   bool isCortexA9() const { return ARMProcFamily == CortexA9; }
+  bool isCortexM3() const { return CPUString == "cortex-m3"; }
 
   bool hasARMOps() const { return !NoARM; }